• Journal of Welding and Joining
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• v.32 no.2
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• pp.29-36
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• 2014

Recently, in order to enhance the function and usefulness of products, cladding of dissimilar materials that maximizes the performance of the material is being widely used in all areas of industry as an important process. Clad steel plate, produced by cladding stainless steel plate, an anticorrosive material, on carbon steel plate, is being used to produce pressure vessels. Stainless steel plate has good corrosion resistance, and carbon steel plate has good rigidity and strength; clad steel can satisfy all of these qualities at once. This study aims to find the ${\delta}$-ferrite behavior, mechanical properties, structure change, integrity and reliability of clad steel weld on hot rolled steel plates. For this purpose, multi-layer welding, repair welding and post weld heat treatment were implemented according to welding procedure specifications (WPS). In order to observe the mechanical properties and toughness of clad steel weld zone, post weld heat treatment was carried out according to ASME Sec. VIII Div.1 UW-40 procedure for post weld heat treatment. With heat treatment at $625^{\circ}C$, the hold time was used as the process variable, increased by intervals that were doubled each time, from 80 to 1,280 min. The structure of weld part was typical cast structure; localized primary austenite areas appeared near central vermicular ferrite and fusion line. The heat affected zone showed rough austenite structure created by the weld heat input. Due to annealing effects of heat treatment, the mechanical properties (tensile strength, hardness, impact value) of the heat affected area tended to decrease. From the results of this study, it is possible to conclude the integrity of clad steel welds is not affected much in field welding, repair welding, multi-layer welding, post weld heat treatment, etc.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.22 no.2
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• pp.65-72
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• 2012

Aluminum induced crystallization of amorphous silicon was attempted by the aluminum substrate. To avoid the layer exchange between silicon and aluminum layer, Ni layer was deposited between these two layers by sputtering. To obtain the bigger grain of the crystalline silicon, wet blasted silica layer was employed as windows between the nickel and a-Si layer. Ni obtained after the annealing treatment at $520^{\circ}C$ was found to be a promising material for the diffusion barrier between silicon and aluminum. One way to obtain bigger grain of crystalline silicon layer applicable to solar cell of higher performance was envisioned in this investigation.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.34 no.11
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• pp.1649-1657
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• 2010

We have investigated the unexpected phenomena on the surface of molded GFRP composites. The major cause of the unevenness, as a result of which the surface becomes rough, is a shrinking of the matrix in the process of holding pressure and cooling temperature. The higher holding pressure load in a molding process and the lower demolding temperature in an annealing experiment, the better GFRP composites moldings improved its appearance. In addition, by taking the holding pressure and demolding temperature into consideration, we evaluate the process that causes the surface unevenness and the variation in the fiber projection height.

• Journal of the Korean Magnetics Society
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• v.6 no.2
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• pp.93-97
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• 1996

The effects of annealing after deposition on the magnetic and magneto-optical properties of MnSbPt thin films prepared by rf sputtering were investigated. The MnSbPt alloy thin films were annealed in a vacuum with $10^{-5}$ Torr and the air, respectively, as a function of temperature and time. The films annealed at $300^{\circ}C$ for 4 hours was found to have the highest value of the saturation magnetization. The films annealed in the air did not show any thermal degradations, which indicates their chemical stability for the magneto-optical recording process. It was revealed that the $Mn_{43}Sb_{46}Pt_{11}$ films annealed at $300^{\circ}C$ for 4hours in a vacuum with $10^{-5}$ Torr exhibit high Kerr rotation angle of $0.8^{\circ}$ for the incident wavelength of 550nm, which is ascribed to the increase of the volume ratio of Clb phase. However, similar to the PtMnSb alloy thin films, these films are still horizontally magnetized and have the coercive field less than 400 Oe.

• Journal of Magnetics
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• v.12 no.3
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• pp.118-123
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• 2007

We have studied the effect of Au-Cu back layer system ${\sim}10{\AA}$ thick on the properties of a spin valve. The back layers were Cu, Au, co-sputtered $Cu_xAu_{1-x}$, laminated $[Au/Cu]_n$. and bi-layer [Au/Cu]. When Au was added to the Cu, the resistance of the spin valve abruptly increased most likely due to impurity scattering. The GMR values were not increased significantly for all the structures. In the case of co-sputtered $Cu_xAu_{1-x}$, the changes in the resistance, ${\Delta}R$, was increased at a composition of ${\sim}Au_{0.5}Cu_{0.5}$. This increase in ${\Delta}R$ is due to increase in the resistance and not from the enhanced spin-dependent scattering. The structural analyses showed that the orthorhombic $Au_{0.5}Cu_{0.5}$ was formed in the back layer instead of the face-centered tetragonal $Au_{0.5}Cu_{0.5}$ as we expected. Thermal annealing over $400^{\circ}C$ may be required to have face-centered tetragonal in the $10{\AA}$ thick ultra-thin film. In the case of a laminated or bi-layered back layer, the properties of the spin valve were improved, which may be attributed to the increase in the mean free path of conduction electrons.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.4
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• pp.532-542
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• 1996

The electrical and optical properties of the annealed $LiNbO_{3}$ single crystal with congruently melting composition and MgO or ZnO doped $LiNbO_{3}$ single crystal grown by the FZ method. The electrical and optical properties such as electrical conductivity, dielectric constant (Curie temperature), electro-mechanical coupling factor, optical transmittance and refractive indices of the grown crystals were measured and the nonlinear refractive indices of the grown crystals were calculated theoretically. The doping effects of MgO and ZnO were investigated by comparing the electrical and optical properties of the undoped $LiNbO_{3}$ single crystal and those of the $LiNbO_{3}$ single crystals doped with MgO or ZnO.

• Journal of the Korean Ceramic Society
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• v.43 no.11 s.294
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• pp.688-692
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• 2006

Ferroelectric lanthanides-substituted $Bi_4Ti_3O_{12}$ $(Bi_{4-x}Ln_xTi_3O_{12}, BLnT)$ thin films approximately 200 nm in thickness were deposited by metal organic chemical vapor deposition onto Pt(111)/Ti/SiO$_2$/Si(100) substrates. Many researchers reported that the lanthanides substitution for Bi in the pseudo-perovskite layer caused the distortion of TiO$_6$ octahedron in the a-b plane accompanied with a shift of the octahedron along the a-axis. In this study, the effect of lanthanides (Ln=Pr, Eu, Gd, Dy)-substitution and crystallization temperature on their ferroelectric properties of bismuth titanate $(Bi_4Ti_3O_{12}, BIT)$ thin films were investigated. As BLnT thin films were substituted to lanthanide elements (Pr, Eu, Gd, Dy) with a smaller ionic radius, the remnant polarization (2P$_r$) values had a tendency to increase and made an exception of the Eu-substituted case because $Bi_{4-x}Eu_xTi_3O_{12}$ (BET) thin films had the smaller grain sizes than the others. In this study, we confirmed that better ferroelectric properties can be expected for films composed of larger grains in bismuth layered peroskite materials. The crystallinity of the thin films was improved and the average grain size increased as the crystallization temperature,increased from 600 to 720$^{\circ}C$. Moreover, the BLnT thin film capacitor is characterized by well-saturated polarization-electric field (P-E) curves with an increase in annealing temperature. The BLnT thin films exhibited no significant degradation of switching charge for at least up to $1.0\times10^{11}$ switching cycles at a frequency of 1 MHz. From these results, we can suggest that the BLnT thin films are the suitable dielectric materials for ferroelectric random access memory applications.

• Transactions of the Korean Society of Automotive Engineers
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• v.15 no.1
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• pp.8-15
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• 2007

Freeway corridors consist of urban freeways and parallel arterials that drivers can use alternatively. Ramp metering in freeways and signal control in arterials are contemporary traffic control methods that have been developed and applied in order to improve traffic conditions of freeway corridors. However, most of the existing studies have focused on either optimal ramp metering in freeways, or progression signal strategies between arterial intersections. There have been no traffic control systems in Korea that integrates the freeway ramp metering and arterial signal control. The effective control strategies for freeway operations may cause negative effects on arterial traffic. On the other hand, traffic congestion and bottleneck phenomenon of arterials due to the increasing peak-hour travel demand and ineffective signal operation may generate an accessibility problem to freeway ramps. Thus, the main function of the freeway which is the through-traffic process has not been successful. The purpose of this study is to develop an integrated control model that connects freeway ramp metering systems and signal control systems in arterial intersections. And Optimization of integrated control model which consists of ramp metering and signal control is another purpose. The design of experiment, neural network, and simulated annealing are used for optimization.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.20-20
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• 2007

Nanowire-based field-effect transistors (FETs) decorated with nanoparticles have been greatly paid attention as nonvolatile memory devices of next generation due to their excellent transportation ability of charge carriers in the channel and outstanding capability of charge trapping in the floating gate. In this work, top-gate single ZnO nanowire-based FETs with and without Au nanoparticles were fabricated and their memory effects were characterized. Using thermal evaporation and rapid thermal annealing processes, Au nanoparticles were formed on an $Al_2O_3$ layer which was semi cylindrically coated on a single ZnO nanowire. The family of $I_{DS}-V_{GS}$ curves for the double sweep of the gate voltage at $V_{DS}$ = 1 V was obtained. The device decorated with nanoparticles shows giant hysterisis loops with ${\Delta}V_{th}$ = 2 V, indicating a significant charge storage effect. Note that the hysterisis loops are clockwise which result from the tunneling of the charge carriers from the nanowire into the nanoparticles. On the other hand, the device without nanoparticles shows a negligible countclockwise hysterisis loop which reveals that the influence of oxide trap charges or mobile ions is negligible. Therefore, the charge storage effect mainly comes from the nanoparticles decorated on the nanowire, which obviously demonstrates that the top-gate single ZnO nanowire-based FETs decorated with Au nanoparticles are the good candidate for the application in the nonvolatile memory devices of next generation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.111-111
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• 2007

Further scaling the semiconductor devices down to low dozens of nanometer needs the extremely shallow depth in junction and the intentional counter-doping in the silicon gate. Conventional ion beam ion implantation has some disadvantages and limitations for the future applications. In order to solve them, therefore, plasma source ion implantation technique has been considered as a promising new method for the high throughputs at low energy and the fabrication of the ultra-shallow junctions. In this paper, we study about the effects of DC bias and base pressure as a process parameter. The diluted mixture gas (5% $PH_3/H_2$) was used as a precursor source and chamber is used for vacuum pressure conditions. After ion doping into the Si wafer(100), the samples were annealed via rapid thermal annealing, of which annealed temperature ranges above the $950^{\circ}C$. The junction depth, calculated at dose level of $1{\times}10^{18}/cm^3$, was measured by secondary ion mass spectroscopy(SIMS) and sheet resistance by contact and non-contact mode. Surface morphology of samples was analyzed by scanning electron microscopy. As a result, we could accomplish the process conditions better than in advance.