• Journal of Electrical Engineering and information Science
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• v.2 no.6
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• pp.202-207
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• 1997

Design and fabrication issues for an L-band GaAs Monolithic Microwave Integrated Circuit(MMIC) Voltage Controlled Oscillator(VCO) as a component of Personal Communications Systems(PCS) Radio Frequency(RF) transceiver are discussed. An ion-implanted GaAs MESFET tailored toward low current and low noise with 0.5mm gate length and 300mm gate width has been used as an active device, while an FET with the drain shorted to the source has been used as the voltage variable capacitor. The principal design was based on a self-biased FET with capacitive feedback. A tuning range of 140MHz and 58MHz has been obtained by 3V change for a 600mm and a 300mm devices, respectively. The oscillator output power was 6.5dBm wth 14mA DC current supply at 3.6V. The phase noise without any buffer or PLL was 93dB/1Hz at 100KHz offset. Harmonic balance analysis was used for the non-linear simulation after a linear simulation. All layout induced parasitics were incorporated into the simulation with EEFET2 non-linear FET model. The fabricated circuits were measured using a coplanar-type probe for bare chips and test jigs with ceramic packages.

• Transactions of the Korean Society of Mechanical Engineers
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• v.17 no.7 s.94
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• pp.1649-1657
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• 1993

This paper reports on a proof-of-concept experimental investigation focused on evaluating the vibration characteristics and control of smart hollow cantilever beams filled with an electro-rheological(ER) fluid. The beams are considered to be of uniform viscoelastic materials and modelled as a viscously-damped harmonic oscillator. Electric field-dependent natural frequencies, loss factors and complex moduli are evaluated and compared among three different beams : two types of different volume fraction of ER fluid and one type of different particle concentration of ER fluid by weight. Modal characteristics of the beams are observed in both the absence and the presence of electric potentials. It is also shown that by constructing active control algorithm the removal of structural resonances and the suppression of tip deflection are obtained. This result provides the feasiblility of ER fluids as an active vibration control element.

• ETRI Journal
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• v.27 no.5
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• pp.569-578
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• 2005

The purpose of this paper is to describe the implementation of monolithically matching circuits, interface circuits, and RF core circuits to the same substrate. We designed and fabricated on-chip 1 to 6 GHz up-conversion and 1 to 8 GHz down-conversion mixers using a 0.8 mm SiGe hetero-junction bipolar transistor (HBT) process technology. To fabricate a SiGe HBT, we used a reduced pressure chemical vapor deposition (RPCVD) system to grow a base epitaxial layer, and we adopted local oxidation of silicon (LOCOS) isolation to separate the device terminals. An up-conversion mixer was implemented on-chip using an intermediate frequency (IF) matching circuit, local oscillator (LO)/radio frequency (RF) wideband matching circuits, LO/IF input balun circuits, and an RF output balun circuit. The measured results of the fabricated up-conversion mixer show a positive power conversion gain from 1 to 6 GHz and a bandwidth of about 4.5 GHz. Also, the down-conversion mixer was implemented on-chip using LO/RF wideband matching circuits, LO/RF input balun circuits, and an IF output balun circuit. The measured results of the fabricated down-conversion mixer show a positive power conversion gain from 1 to 8 GHz and a bandwidth of about 4.5 GHz.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.522-529
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• 2002

MMIC circuits in whole receiver system was fabricated based on GaAs pHEMT technology. And a V-band downconverter module was fabricated by integrating these circuits. The downconverter module consists of a LO drive power amplifier which generates 24dBm output power, a low noise amplifier(LNA) which shows 20 dB small signal gain, an active parallel feedback oscillator which generates 1.6 dBm output power, and a cascode mixer which shows over 6dB conversion gain. The good conversion gain performance of our mixer made no need to attach any IF amplifier which grows conversion gain. Measured results of the complete downconverter show a conversion gain of over 20 dB between 57.5 GHz and 61.7GHz without IF amplifier.

• Journal of Power Electronics
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• v.10 no.5
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• pp.548-554
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• 2010

In this paper, a 1.5 kW Interior Permanent Magnet Synchronous Generator (IPMSG) with a power conditioner for the grid integration of a variable-speed wind turbine is developed. The power-conditioning system consists of a series-type 12-pulse diode rectifier powered by a phase shifting transformer and then cascaded to a PWM voltage source inverter. The PWM inverter is utilized to supply sinusoidal currents to the utility line by controlling the active and reactive current components in the q-d rotating reference frame. While the q-axis active current of the PWM inverter is regulated to follow an optimized active current reference so as to track the maximum power of the wind turbine. The d-axis reactive current can be adjusted to control the reactive power and voltage. In order to track the maximum power of the wind turbine, the optimal active current reference is determined by using a simple MPPT algorithm which requires only three sensors. Moreover, the phase angle of the utility voltage is detected using a simple electronic circuit consisting of both a zero-crossing voltage detecting circuit and a counter circuit employed with a crystal oscillator. At the generator terminals, a passive filter is designed not only to decrease the harmonic voltages and currents observed at the terminals of the IPMSG but also to improve the generator efficiency. The laboratory results indicate that the losses in the IPMSG can be effectively reduced by setting a passive filter at the generator terminals.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.89-95
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• 2003

In this paper, we have designed and fabricated high conversion gain Q-band active sub-harmonic mixers for a receiver of millimeter wave wireless communication systems. The fabricated active sub-harmonic mixer uses 2nd harmonic signals of a low local oscillator (LO) frequency. The fabricated mixer was successfully integrated by using $0.1{\;}\mu\textrm{m}$GaAs pseudomorphic high electron mobility transistors (PHEMTs) and coplanar waveguide (CPW) structures. From the measurement, it shows that maximum conversion gain of 4.8 dB has obtained at a RF frequency of 40 GHz for 10 dBm LO power of 17.5 GHz. Conversion gain from the fabricated sub-harmonic mixer is one of the best reported thus far. And a phase noise of the 2nd harmonic was obtained -90.23 dBc/Hz at 100 kHz offset. The active sub-harmonic mixer also ensure a high degree of isolations, which are -35.8 dB from LO-to-IF and -40.5 dB from LO-to-RF, respectively, at a LO frequency of 17.5 GHz.

• ETRI Journal
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• v.7 no.4
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• pp.11-14
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• 1985

A polysilicon self-aligned bipolar n-p-n transistor structure is described, which can be used in high speed and high packing density LSI circuits The emitter of this transistor is separated less than $0.4\mum$ with base contact by polysilicon self-align technology. Through all the process, the active region of this device is not damaged. therefore a high performance device is obtained. Using the transistor with $3.0\mum$ design rules, a CML ring oscillator has per-gate minimum propagation delay time of 400 ps at 2.7 mW power consumption condition.

• Journal of IKEEE
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• v.3 no.1 s.4
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• pp.39-49
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• 1999

This paper describes a 1 GHz, low-phase-noise CMOS fractional-N frequency synthesizer with an integrated LC VCO. The proposed frequency synthesizer, which uses a high-order delta-sigma modulator to suppress the fractional spurious tones at all multiples of the fractional frequency resolution offset, has 64 programmable frequency channels with frequency resolution of $f_ref/64$. The measured phase noise is as low as -110 dBc/Hz at a 200 KHz offset frequency from a carrier frequency of 980 MHz. The reference sideband spurs are -73.5 dBc. The prototype is implemented in a $0.5{\mu}m$ CMOS process with triple metal layers. The active chip area is about $4mm^2$ and the prototype consumes 43 mW, including the VCO buffer power consumption, from a 3.3 V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.625-631
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• 2014

We propose a compact power-on reset circuit consisting of a switched capacitor, a capacitor, and a Schmitt trigger inverter. A switched capacitor working with a clock signal charges the capacitor. Thus, the voltage across the capacitor is increased toward the supply voltage. The circuit provides a reset pulse until the voltage across the capacitor reaches the high threshold voltage of the Schmitt trigger inverter. The proposed circuit is simple, compact, has no static power consumption, and works for a wide range of power-on rising times. Furthermore, the clock signal is available while the reset pulse is activated. The proposed circuit works for up to 6 s of power-on rising time, and occupies a $60{\times}30{\mu}m^2$ active area.

• Journal of IKEEE
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• v.15 no.2
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• pp.129-133
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• 2011

A spread spectrum clock generation is an efficient way to reduce electro-magnetic interference (EMI) radiation in modern mixed signal chip systems. The proposed circuit generates the spread spectrum clock by directly injecting the modulation voltage into the voltage-controlled oscillator (VCO) current source for SATA II. The resulting 33KHz modulation profile has a Hersey-Kiss shape with a rounded peak. The chip has been fabricated using $0.18{\mu}m$ CMOS process and test results show that the proposed circuit achieves 0.509% (5090ppm) down spreading at 1.5GHz and peak power reduction of 10dB. The active chip area is 0.36mm ${\times}$ 0.49mm and the chip consumes 30mW power at 1.5GHz.