• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.328-331
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• 1988

Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

• 대한전기학회논문지
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• 제45권3호
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• pp.386-392
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• 1996

Zinc-Borosilicate is used as a side insulator wall to make high breakdown voltage with one Field Limiting Ring in a power p-n junction device in simulation. It is known that surface charge density can be yield at the interface of Zinc-Borosilicate glass / silicon system. When the glass is used as a side insulator wall, surface charge varied potential distribution and breakdown voltage is improved 1090 V under the same structure.The breakdown voltage under varying the surface charge density has a limit value. When the epitaxial thickness is varied, the position of FLR doesn't influence to the breakdown characteristic not only under non punch-through structure but also under punch-through structure. (author). 7 refs., 12 figs., 2 tabs.

• 한국통신학회논문지
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• 제21권4호
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• pp.1048-1058
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• 1996

본 논문에서는 이중모드 공동 공진기로 구성된 송.수신 필터와 H-면 T-junction를 이용하여 Ku-band용 소형 듀플렉서를 설계.제작하였다. 듀플렉서는 송신 12.5GHz와 수신 14.5GHz에서 대역폭 100MHz를 갖도록 설계하였다. 설계.제작된 듀플렉서는 송신(TX) 및 수신(RX)필터를 이중모드 필터로 구성하여 공동 공진기 필터 구조를 갖는 기존의 듀플렉서에 비해서 크기를 약 40%이상 감소시키는 결과를 얻을 수 있었다. 듀플렉서의 동작특성은 H-면 T-junction부와 필터간의 정합시 각 필터의 특성이 왜곡되지 않도록 컴퓨터 시뮬레이션하였다. 이러한 결과 필터 자체의 특성과 듀플렉서 연결 후 특성은 거의 일치하는 결과를 얻을 수 있었다.

• Parasites, Hosts and Diseases
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• 제28권4호
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• pp.197-206
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• 1990

MDCK세포간에 형성된 tight junction이 Toxoplasma gondii이 숙주세포 침투에 미치는 영향에 대하여 고찰 하기 위해 여러 조건의 세포배양을 시행하였다. MDCK세포를 25-well배양기 내의 18-mm cover glass에 $1{\times}10^5,{\;}3{\times}10^5{\;}및{\;}5{\times}10^5$ 개로 분주한 후 배양 1, 2, 3 및 4일에 다수의 Toxoplasma를 첨가하여 1시간 동안 배양한 다음 Giemsa 용액으로 염색한 후 관찰하였을 때, 각 실험군에서 침투한 원충의 숫자는 숙주세포가 포화밀도를 이루면서 급격히 감소하였다. 배양액 내의 calcium 농도를 일반적인 1.8mM에서 $5{\;}{\mu}M$로 낮추어 포화밀도의 MDCK 세포간에 tight junction 형성을 억제하였을 때, 원충의 침투가 약 2배 증가하였으며(p<0.05) 포화밀도 이전의 배양에서는 원충의 침투가 감소하였다. Trypsin-EDTA를 처리하여 포화밀도의 배양에서 tight junction을 소화 시킨 경우, 원충의 침투가 약 2.5배 증가하였으며 (p<0.05) 포화밀도 이전의 배양에서는 급격히 감소하였다. 이상의 결과들로 볼 때, 포화밀도의 MDCK세포간에 형성된 tight junction이 Toxoplasma의 침투를 억제하는 것을 알 수 있었다. 이는 Toxoplasma가 숙주세포로 침투할 때 숙주세포의 막구조에 대한 특이성이 있음을 시사 하며, 상피세포에서는 tight junction 위의 막(apical membrane) 보다 옆 및 아래의 막(basolateral membrane)상의 구조를 이용하는 것으로 추정되었다.

• Structural Engineering and Mechanics
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• 제13권5호
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• pp.465-478
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• 2002

This study lays emphasis on the development of efficient analytical models for a multistory structure with wings, including the in-plane deformation of floor slabs. For this purpose, a multistory structure with wings is regarded as the combination of multistory structures with rectangular plan and their junctions. In addition, a multistory structure with a rectangular plan is considered to be an assemblage of two-dimensional frames and floor slabs connecting two adjacent frames at each floor level. This modeling, concept can be easily applied to multistory structures with plans in the shape of L, T, Y, U, H, etc. To represent the in-plane deformation of floor slabs efficiently, a two-dimensional frame and the floor slab connecting two adjacent frames at each floor level are modeled as a stick model with two degrees of freedom per floor and a stiff beam with shear deformations, respectively. Three models are used to investigate the effect of in-plane deformation of the floor slab at the junction of wings on the seismic behavior of structures. Based on the comparison of dynamic analysis results obtained using the proposed models and three-dimensional finite element models, it could be concluded that the proposed models can be used as an efficient tool for an approximate analysis of a multistory structure with wings.

• 전자공학회논문지A
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• 제31A권12호
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• pp.80-90
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• 1994

To develop VLSI of higher packing density with 0.5.mu.m gate length of less, semiconductor devices require shallow junction with higher doping concentration. the most common method to form the shallow junction is ion implantation, but in order to remove the implantation induced defect and activate the implanted impurities electrically, ion-implanted Si should be annealed at high temperature. In this annealing, impurities are diffused out and redistributed, creating deep PN junction. These make it more difficult to form the shallow junction. Accordingly, to miimize impurity redistribution, the thermal-budget should be kept minimum, that is. RTA needs to be used. This paper reports results of the diffusion characteristics of PSG film by varying Phosphorus weitht %/ Times and temperatures of RTA. From the SIMS.ASR.4-point probe analysis, it was found that low sheet resistance below 100 .OMEGA./ㅁand shallow junction depths below 0.2.mu.m can be obtained and the surface concentrations are measured by SIMS analysis was shown to range from 2.5*10$^{17}$ aroms/cm$^{3}$~3*10$^{20}$ aroms/cm$^{3}$. By depending on the RTA process of PSG film on Si, LDD-structured nMOSFET was fabricated. The junction depths andthe concentration of n-region were about 0.06.mu.m. 2.5*10$^{17}$ atom/cm$^{-3}$ , 4*10$^{17}$ atoms/cm$^{-3}$ and 8*10$^{17}$ atoms/cm$^{3}$, respectively. As for the electrical characteristics of nMOS with phosphorus junction for n- region formed by RTA, it was found that the characteristics of device were improved. It was shown that the results were mainly due to the reduction of electric field which decreases hot carriers.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.29-32
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• 2002

This paper describes a novel structure of NMOSFET with elevated SiGe source/drain region and ultra-shallow source/drain extension(SDE)region. A new ultra-shallow junction formation technology. Which is based on damage-free process for rcplacing of low energy ion implantation, is realized using ultra-high vacuum chemical vapor deposition(UHVCVD) and excimer laser annealing(ELA).

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2005년도 춘계학술대회
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• pp.196-200
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• 2005

In this work, we investigated simple Aㅣ/TCO/a-Si:H(n)/c-Si(p)/Al hetero-junction solar cells prepared by low temperature processes, unlike conventional thermal diffused c-Si solar cells. a-Si:H/c-Si hetero-junction solar cells are processed by low temperature deposition of n-type hydrogenated amorphous silicon (a-Si:H) films by plasma-enhanced chemical vapor deposition on textured and flat p-type silicon substrate. A detailed investigation was carried out to acquire optimization and compatibility of amorphous layer, TCO (ZnO:Al) layer depositions by changing the plasma process parameters. As front TCO and back contact, ZnO:Al and AI were deposited by rf magnetron sputtering and e-beam evaporation, respectively. The photovoltaic conversion efficiency under AMI.5 and the quantum efficiency on $1cm^2$ sample have been reported. An efficiency of $12.5\%$ is achieved on hetero-structure solar cells based on p-type crystalline silicon.

• 한국통신학회논문지
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• 제25권6A호
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• pp.818-824
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• 2000

단일 또는 2중 금속삽입 필터의 도파관 폭을 축소시켜 차단대역 특성을 개선시키기 위한 연구가 수행되어 왔다. 그러나 이러한 구조의 필터는 도파관의 폭 변화에 의한 삽입손실을 최소화시켜야 하는 설계상의 어려움과 더불어 도파관의 폭을 축소시키는 까다로운 제작상의 문제점이 발생한다. 본 논문에서는 도파관의 폭을 변화시켜 차단대역 특성을 개선시키는 필터의 설계와 제작이 어려우므로 이를 극복하는 방법으로 폭 변화없는 3중 금속삽입 필터의 사용을 제안하고 삽입 금속판 길이의 제작상 오차 0.1mm를 고려한 최적화 설계방법을 사용하여 필터를 설계하고 제작하였다. 제작된 3중 금속삽입 필터의 측정 결과는 13.62 GHz에서 67.5 dB의 삽입손실로 가장 개선된 차단대역 특성으로 설계치와 일치하였다. 그러므로 필터의 최적화 설계에 의한 3중 금속삽입 필터의 제작방법이 차단대역 특성을 개선시키는데 실용적임을 보였다.

• 전자공학회논문지A
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• 제30A권6호
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• pp.38-48
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• 1993

A recessed n-p Juction diode with the self-aligned sturcture is proposed and fabricated by using the polysilicon as an n$^{+}$ diffusion source. The diode structure can be applicable to the emitter-base formation of high performance bipolar divice and the n$^{+}$ polysilicone mitter has an important effect on the device characteristics. The considered parameters for the polysilicon formation are the deposition condition. As$^{+}$ dose for the doping of the polysilicon and the annealing condition using RTP system. The vertical depth profiles of the fabricated diode are obtained by SIMS and the electrical characteristics are analyzed in terms of the ideality factor of diode (n), contact resistance and reverse leakage current. In addition, n$^{+}$-p junction diodes are formed by using the amorphous silicon (of combination of amorphous and polysiliocn) instead of polysilicon and their characteristics are compared with those of the standard sample. The As$^{+}$ dose for the formation of good junction is about 1~2${\times}10^{16}cm^{2}$ at given RTA conditions (1100.deg. C, 10sec).