• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.13-16
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• 2006

We have proposed and experimentally demonstrated the all-optical composite logic gates with XOR, NOR, OR and NAND functions using SOA-MZI structures to make it possible to simultaneously perform various logical functions. The proposed scheme is robust and feasible for high speed all-optical logic operation with high ER.

• Journal of the Optical Society of Korea
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• v.17 no.5
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• pp.362-370
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• 2013

In this paper, we propose a novel optical implementation of a 3DES algorithm based on dual XOR logic operations for a cryptographic system. In the schematic architecture, the optical 3DES system consists of dual XOR logic operations, where XOR logic operation is implemented by using a free-space interconnected optical logic gate method. The main point in the proposed 3DES method is to make a higher secure cryptosystem, which is acquired by encrypting an individual private key separately, and this encrypted private key is used to decrypt the plain text from the cipher text. Schematically, the proposed optical configuration of this cryptosystem can be used for the decryption process as well. The major advantage of this optical method is that vast 2-D data can be processed in parallel very quickly regardless of data size. The proposed scheme can be applied to watermark authentication and can also be applied to the OTP encryption if every different private key is created and used for encryption only once. When a security key has data of $512{\times}256$ pixels in size, our proposed method performs 2,048 DES blocks or 1,024 3DES blocks cipher in this paper. Besides, because the key length is equal to $512{\times}256$ bits, $2^{512{\times}256}$ attempts are required to find the correct key. Numerical simulations show the results to be carried out encryption and decryption successfully with the proposed 3DES algorithm.

• Korean Journal of Optics and Photonics
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• v.17 no.6
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• pp.564-568
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• 2006

Using the cross-gain modulation (XGM) characteristics of semiconductor optical amplifiers (SOAs), multi-functional all-optical logic gates, including XOR, AND, and OR gates are successfully simulated and demonstrated at 10Gbit/s. A VPI component maker^TM simulation tool is used for the simulation of multi-functional all-optical logic gates and the10 Cbit/s input signal is made by a mode-locked fiber ring laser. A multi-quantum well (MQW) SOA is used for the simulation and demonstration of the all-optical logic system. Our suggested system is composed of three MQW SOAs, SOA-1 and SOA-2 for XOR logic operation and SOA-2 and SOA-3 for AND logic operation. By the addition of two output signals XOR and AND, all-optical OR logic can be obtained.

• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.337-340
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• 2000

In this paper, we put forth a procedure that target low power logic synthesis based on XOR representation of Boolean functions, and the results of synthesis procedure are a multi-level XOR form with minimum switching activity. Specialty, this paper show a method to extract the common cubes or kernels by Boolean matrix and rectangle covering, and to estimate the power consumption in terms of the extracted common sub-functions.

• Korean Journal of Optics and Photonics
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• v.19 no.3
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• pp.237-241
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• 2008

An all-optical encryption system built on the basis of electrical logic circuit design principles is proposed, using semiconductor optical amplifier (SOA) exclusive or (XOR) logic gates. Numerical techniques (steady-state and dynamic) were employed in a sequential manner to optimize the system parameters, speeding up the overall design process. The results from both numerical and experimental testbeds show that the encoding/decoding of the optical signal can be achieved at a 10 Gbps data rate with a conventional SOA cascade without serious degradation in the data quality.

• Korean Journal of Optics and Photonics
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• v.24 no.5
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• pp.262-270
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• 2013

In this paper, we propose a modified optical CBC(Cipher Block Chaining) encryption method using optical XOR logic operations. The proposed method is optically implemented by using dual encoding and a free-space interconnected optical logic gate technique in order to process XOR operations in parallel. Also, we suggest a CBC encryption/decryption optical module which can be fabricated with simple optical architecture. The proposed method makes it possible to encrypt and decrypt vast two-dimensional data very quickly due to the fast optical parallel processing property, and provides more security strength than the conventional electronic CBC algorithm because of the longer security key with the two-dimensional array. Computer simulations show that the proposed method is very effective in CBC encryption processing and can be applied to even ECB(Electronic Code Book) mode and CFB(Cipher Feedback Block) mode.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.936-944
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• 2003

In this paper, we propose an AND/XOR-based technology mapping method for field programmable gate arrays (FPGAs). Due to the fixed size of the programmable blocks in an FPGA, decomposing a circuit into sub-circuits with appropriate number of inputs can achieve excellent implementation efficiency. Specifically, the proposed technology mapping method is based on Davio expansion theorem to decompose a given Boolean circuit. The AND/XOR nature of the proposed method allows it to operate on XOR intensive circuits, such as error detecting/correcting, data encryption/decryption, and arithmetic circuits, efficiently. We conduct experiments using MCNC benchmark circuits. When using the proposed approach, the number of CLBs (configurable logic blocks) is reduced by 67.6% (compared to speed-optimized results) and 57.7% (compared to area-optimized results), total equivalent gate counts are reduced by 65.5 %, maximum combinational path delay is reduced by 56.7 %, and maximum net delay is reduced by 80.5 % compared to conventional methods.

• Interdisciplinary Bio Central
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• v.3 no.3
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• pp.10.1-10.8
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• 2011

Introduction: Hash functions are computer algorithms that protect information and secure transactions. In response to the NIST's "International Call for Hash Function", we developed a biological hash function using the computing capabilities of bacteria. We designed a DNA-based XOR logic gate that allows bacterial colonies arranged in a series on an agar plate to perform hash function calculations. Results and Discussion: In order to provide each colony with adequate time to process inputs and perform XOR logic, we designed and successfully demonstrated a system for time-delayed bacterial growth. Our system is based on the diffusion of ${\ss}$-lactamase, resulting in destruction of ampicillin. Our DNA-based XOR logic gate design is based on the op-position of two promoters. Our results showed that $P_{lux}$ and $P_{OmpC}$ functioned as expected individually, but $P_{lux}$ did not behave as expected in the XOR construct. Our data showed that, contrary to literature reports, the $P_{lux}$ promoter is bidirectional. In the absence of the 3OC6 inducer, the LuxR activator can bind to the $P_{lux}$ promoter and induce backwards transcription. Conclusion and Prospects: Our system of time delayed bacterial growth allows for the successive processing of a bacterial hash function, and is expected to have utility in other synthetic biology applications. While testing our DNA-based XOR logic gate, we uncovered a novel function of $P_{lux}$. In the absence of autoinducer 3OC6, LuxR binds to $P_{lux}$ and activates backwards transcription. This result advances basic research and has important implications for the widespread use of the $P_{lux}$ promoter.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.29B no.11
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• pp.56-64
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• 1992

The sum-of-product type MVL (Multiple-valued logic) functions can be directly transformed into the exclusive-sum-of-literal-product(ESOLP) type MVL functions with a substitution of the OR operator with the exclusive-OR(XOR) operator. This paper presents an algorithm that can reduce the number of minterms for the purpose of minimizing the hardware size and the complexity of the circuit in the realization of ESOLP-type MVL functions. In Boolean algebra, the joinable true minterms can form the cube, and if some cubes form a cube-chain with adjacent cubes by the insertion of false cubes(or, false minterms), then the created cube-chain can become a large cube which includes previous cubes. As a result of the cube grouping, the number of minterms can be reduced artificially. Since ESOLP-type MVL functions take the MIN/XOR structure, a XOR circuit and a four-valued MIN/XOR dynamic-CMOS PLA circuit is designed for the realization of the minimized functions, and PSPICE simulation results have been also presented for the validation of the proposed algorithm.

• Korean Journal of Optics and Photonics
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• v.13 no.1
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• pp.84-87
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• 2002

By using SOA (Semiconductor Optical Amplifier), all-optical XOR gate has been demonstrated at 5 Gb/s in RZ format. Firstly, Boolean AB-and Boolean AB have been obtained. Then, Boolean AB and Boolean AB have been combined to achieve the all-optical XOR gate, which has Boolean logic of AB+AB.