• Journal of Computing Science and Engineering
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• v.9 no.2
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• pp.51-72
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• 2015

Time predictability is crucial in hard real-time and safety-critical systems. Cache memories, while useful for improving the average-case memory performance, are not time predictable, especially when they are shared in multicore processors. To achieve time predictability while minimizing the impact on performance, this paper explores several time-predictable scratch-pad memory (SPM) based architectures for multicore processors. To support these architectures, we propose the dynamic memory objects allocation based partition, the static allocation based partition, and the static allocation based priority L2 SPM strategy to retain the characteristic of time predictability while attempting to maximize the performance and energy efficiency. The SPM based multicore architectural design and the related allocation methods thus form a comprehensive solution to hard real-time multicore based computing. Our experimental results indicate the strengths and weaknesses of each proposed architecture and the allocation method, which offers interesting on-chip memory design options to enable multicore platforms for hard real-time systems.

• Proceedings of the Korean Information Science Society Conference
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• 2003.10b
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• pp.367-369
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• 2003

인공위성 탑재 소프트웨어는 정해진 시간 내에 필요한 작업을 수행하여야 하는 실시간 내장형 소프트웨어로 타이밍 분석이 중요하다. 기존의 인공위성소프트웨어 개발 시 적용되는 타이밍 분석기법은 개발자의 수작업에 의존하여 많은 시간과 노력이 요구되며 정확성에 문제가 있을 수 있는 단점이 있었다. 본 논문에서는 위성소프트에어의 타이밍 분석에 적용 가능한 최장 실행시간 (Worst Case Execution Time, WCET) 기법을 조사하고 보다 정확한 (tight) WCET를 구하기 위해 입력 데이터를 고려한 WCET 분석 방안을 제안한다.

• Journal of Computing Science and Engineering
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• v.11 no.2
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• pp.58-68
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• 2017

While graphics processing units (GPUs) can be used to improve the performance of real-time embedded applications that require high throughput, it is challenging to estimate the worst-case execution time (WCET) of GPU programs, because modern GPUs are designed for improving the average-case performance rather than time predictability. In this paper, a reordering framework is proposed to regulate the access to the GPU data cache, which helps to improve the accuracy of the estimation of GPU L1 data cache miss rate with low performance overhead. Also, with the improved cache miss rate estimation, tighter WCET estimations can be achieved for GPU programs.

• Journal of Computing Science and Engineering
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• v.7 no.2
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• pp.89-98
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• 2013

This paper presents a complete survey of recent techniques that are applied in the field of real-time Java computing. It focuses on the issues that are especially important for hard real-time applications, which include time predictable garbage collection, worst-case execution time analysis of Java programs, real-time Java threads scheduling and compiler techniques designed for real-time purpose. It also evaluates experimental frameworks that can be used for researching real-time Java. This overview is expected to help researchers understand the state-of-the-art and advance the research in real-time Java computing.

• The Transactions of the Korea Information Processing Society
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• v.7 no.7
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• pp.2204-2218
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• 2000

This paper proposes a dynamic storage allocation algorithm, QHF(quick-half-fit) for real-time systems. The proposed algorithm manages a free block list per each worked size for memory requests of small size, and a free block list per each power of 2 size for memory requests of large size. This algorithms uses the exact-fit policy for small sie requests and provides high memory utilization. The proposed algorithm also has the time complexity O(I) and enables us to easily estimate the worst case execution time (WCET). In order to confirm efficiency of the proposed algorithm, we compare he memory utilization of proposed algorithm with that of half-fit and binary buddy system that have also time complexity O(I). The simulation result shows that the proposed algorithm guarantees the constant WCET regardless of the system memory size and provides lower fragmentation ratio and allocation failure ratio thant other two algorithms.

• Journal of Computing Science and Engineering
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• v.8 no.4
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• pp.215-227
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• 2014

In modern computer architectures, caches are widely used to shorten the gap between processor speed and memory access time. However, caches are time-unpredictable, and thus can significantly increase the complexity of worst-case execution time (WCET) analysis, which is crucial for real-time systems. This paper proposes a time-predictable two-level scratchpad-based architecture and an ILP-based static memory objects assignment algorithm to support real-time computing. Moreover, to exploit the load/store latencies that are known statically in this architecture, we study a Scratch-pad Sensitive Scheduling method to further improve the performance. Our experimental results indicate that the performance and energy consumption of the two-level scratchpad-based architecture are superior to the similar cache based architecture for most of the benchmarks we studied.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.12
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• pp.13-23
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• 1996

In tis paper we researched the implementation methodology and techniques for the high real-time responsive operating system of an ISDN PABX system. The operating system we developed takes a high role as a dedicated real-time operating system for PABX systems. It provides the functions and synchronization, interprocessor communication, interrupt processing, and data I/O processing. And also it provides lots of real-time processing functions for supproting various real-time applications. Finally, we evaluated the performance by measuring the best, the average, and the worst-case execution time of all functions implemented in this real-time operating system.

• Journal of KIISE:Computing Practices and Letters
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• v.5 no.4
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• pp.467-478
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• 1999

실시간 태스크의 최악 실행시간을 예측할 때 과예측이 발생하는 원인은, 첫째 프로그램의 동적인 최악 실행 행태를 정적으로 분석하는 것이 근본적으로 어렵기 때문이며, 둘째 최근의 RISC 형태 프로세서에 포함되어 있는 파이프라인 실행 구조와 캐쉬 등이 그러한 정적 분석을 더욱 어렵게 만들기 때문이다. 그런데 기존의 연구에서는 각각의 과예측 원인을 해결하기 위한 방법에 대해서만 언급하고 있을 뿐 분석의 정확도에서 각 원인이 차지하는 비중에 대해서는 언급하고 있지 않다. 이에 본 연구에서는 최악 실행시간 예측시 과예측을 유발하는 원인들, 즉 분석 요소들의 영향을 정량적으로 조사함으로써 기존의 최악 실행시간 분석 기법들이 보완해야 할 방향을 제시하고자 한다. 본 연구에서는 실험이 특정 분석 기법에 의존하지 않도록 하기 위하여 시뮬레이션 방법에 기반한다. 이를 위해 분석 요소별 스위치가 포함된 MIPS R3000 프로세서를 위한 시뮬레이터를 구현하였는데, 각 스위치는 해당 분석 요소에 대한 분석의 정확도 수준을 결정한다. 모든 스위치 조합에 대해서 시뮬레이션을 반복 수행한 다음 분산 분석을 수행하여 어떤 분석 요소가 가장 큰 영향을 끼치는지 고찰한다.Abstract Existing analysis techniques for estimating the worst case execution time (WCET) of real-time tasks still suffer from significant overestimation due to two types of overestimation sources. First, it is unavoidably difficult to predict dynamic behavior of programs statically. Second, pipelined execution and caching found in recent RISC-style processors even more complicate such a prediction. Although these overestimation sources have been attacked in many existing analysis techniques, we cannot find in the literature any description about questions like which one is most important. Thus, in this paper, we quantitatively analyze the impacts of overestimation sources on the accuracy of the worst case timing analysis. Using the results, we can identify dominant overestimation sources that should be analyzed more accurately to get tighter WCET estimations. To make our method independent of any existing analysis techniques, we use simulation based methodology. We have implemented a MIPS R3000 simulator equipped with several switches, each of which determines the accuracy level of the timing analysis for the corresponding overestimation source. After repeating simulation for all of the switch combinations, we perform the variance analysis and study which factor has the largest impact on the accuracy of the predicted WCETs.

• Journal of the Korea Society for Simulation
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• v.12 no.4
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• pp.51-59
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• 2003

Real-Time applications on Grid environment have several problems in terms of resource management addressed as follows; (1) dynamic resource allocation to provide QoS objectives, (2) heterogeneous resources that is different scale, or capacity in same unit, and (3) resource availability, and resource needs. This paper describes the techniques of resource manager (RM) handling above problems to support QoS of dynamic real-time applications on Grid. The contributions of this paper to solve problems are as follows: unification of dynamic resource requirements among heterogeneous hosts, control of resources in heterogeneous environments, and dynamic load balancing/sharing. Our heuristic allocation scheme works not only 257% better than random, 142% better than round robin, and 36.4% better than least load in QoS sensitivity, but also 38.6% better than random, 28.5% better than round robin, and 31.6% better than least load in QoS.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.11
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• pp.573-580
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• 2001

When tasks access shared resources in real-time systems, the unbounded priority inversion may occur. In such cases it is impossible to guarantee the schedulability of real-time tasks. Several resource access protocols have been proposed to bound the duration of priority inversion and sufficient conditions are given to guarantee the schedulability of periodic task set. In this paper, we show an improved sufficient condition for schedulability when the dynamic priority ceiling protocol is used. Our approach exploits the fact that a lower priority task can continue to execute as far as the higher priority tasks do not miss their deadlines. This permitting execution time of the higher priority tasks for a lower priority task can be excluded from the worst-case blocking time of the higher priority tasks. Since the worst-case blocking time of tasks can be reduced, the sufficient condition for schedulability of dynamic priority ceiling protocol becomes further tight.