• Title/Summary/Keyword: Wireless MMX

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Simulation of YUV-Aware Instructions for High-Performance, Low-Power Embedded Video Processors (고성능, 저전력 임베디드 비디오 프로세서를 위한 YUV 인식 명령어의 시뮬레이션)

  • Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of KIISE:Computing Practices and Letters
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    • v.13 no.5
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    • pp.252-259
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    • 2007
  • With the rapid development of multimedia applications and wireless communication networks, consumer demand for video-over-wireless capability on mobile computing systems is growing rapidly. In this regard, this paper introduces YUV-aware instructions that enhance the performance and efficiency in the processing of color image and video. Traditional multimedia extensions (e.g., MMX, SSE, VIS, and AltiVec) depend solely on generic subword parallelism whereas the proposed YUV-aware instructions support parallel operations on two-packed 16-bit YUV (6-bit Y, 5-bits U, V) values in a 32-bit datapath architecture, providing greater concurrency and efficiency for color image and video processing. Moreover, the ability to reduce data format size reduces system cost. Experiment results on a representative dynamically scheduled embedded superscalar processor show that YUV-aware instructions achieve an average speedup of 3.9x over the baseline superscalar performance. This is in contrast to MMX (a representative Intel#s multimedia extension), which achieves a speedup of only 2.1x over the same baseline superscalar processor. In addition, YUV-aware instructions outperform MMX instructions in energy reduction (75.8% reduction with YUV-aware instructions, but only 54.8% reduction with MMX instructions over the baseline).

An Error Concealment Technique for MPEG-4 Video Transmission over Wireless Networks (무선 네트워크 환경에서의 MPEG-4 비디오 전송을 위한 에러 은닉 기법)

  • Park, Jeong-Beom;Eo, Jin-Woo
    • Journal of IKEEE
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    • v.9 no.2 s.17
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    • pp.170-178
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    • 2005
  • The video data corrupted by the transmission error due to packet loss induce error propagation in decoded video data, and cause poor video quality. To remedy these corrupted video data, there have been introduced two types of error concealment techniques: spatial or temporal error concealment algorithm. Computational overhead by using spatial error concealment algorithm is a serious disadvantage in mobile video data streaming environment. In this paper, we propose hybrid type error concealment technique recovering video quality of mobile device using MPEG-4 video streaming on error-prone wireless network. Our algorithm is implemented in MPEG-4 decoder. The algorithm adopts Intel Wireless MMX technology to provide high performance of portable embedded multimedia mobile device. It is proven that the proposed algorithm shows expected performance for a mobile streaming system(PDA) on IP channels. Our approach showed better processing speed and better video quality comparing with traditional error concealment algorithm.

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Color Media Instructions for Embedded Parallel Processors (임베디드 병렬 프로세서를 위한 칼라미디어 명령어 구현)

  • Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of KIISE:Computer Systems and Theory
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    • v.35 no.7
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    • pp.305-317
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    • 2008
  • As a mobile computing environment is rapidly changing, increasing user demand for multimedia-over-wireless capabilities on embedded processors places constraints on performance, power, and sire. In this regard, this paper proposes color media instructions (CMI) for single instruction, multiple data (SIMD) parallel processors to meet the computational requirements and cost goals. While existing multimedia extensions store and process 48-bit pixels in a 32-bit register, CMI, which considers that color components are perceptually less significant, supports parallel operations on two-packed compressed 16-bit YCbCr (6 bit Y and 5 bits Cb, Cr) data in a 32-bit datapath processor. This provides greater concurrency and efficiency for YCbCr data processing. Moreover, the ability to reduce data format size reduces system cost. The reduction in data bandwidth also simplifies system design. Experimental results on a representative SIMD parallel processor architecture show that CMI achieves an average speedup of 6.3x over the baseline SIMD parallel processor performance. This is in contrast to MMX (a representative Intel's multimedia extensions), which achieves an average speedup of only 3.7x over the same baseline SIMD architecture. CMI also outperforms MMX in both area efficiency (a 52% increase versus a 13% increase) and energy efficiency (a 50% increase versus an 11% increase). CMI improves the performance and efficiency with a mere 3% increase in the system area and a 5% increase in the system power, while MMX requires a 14% increase in the system area and a 16% increase in the system power.