• Journal of Power Electronics
• /
• v.18 no.2
• /
• pp.640-650
• /
• 2018

A TRIAC dimmable LED driver with a wide tuning range and a two-stage uniform dimming scheme is proposed in this paper. To solve the restricted dimming range problem caused by the limited conduction ratio of TRIAC dimmers, a conduction ratio compensation technique is introduced, which can increase the output current up to the rated output current when the TRIAC dimmer turns to the maximum conduction ratio. For further optimization, a two-stage uniform dimming diagram with a rapid dimming curve and a slow dimming curve is designed to make the LED driver regulated visually uniform in the whole adjustable range of the TRIAC dimmer. The proposed control chip is fabricated in a TSMC $0.35{\mu}m$ 5V/650V CMOS/LDMOS process, and verified on a 21V/500mA circuit prototype. The test results show that, in the 90V/60Hz~132V/60Hz ac input range, the voltage linear regulation is 2.6%, the power factor is 99.5% and the efficiency is 83%. Moreover, in the dimming mode, the dimming rate is less than 1% when the maximum dimming current is 516mA and the minimum dimming current is only about 5mA.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.3
• /
• pp.235-242
• /
• 2009

In this paper a new asymmetrical PWM bidirectional half bridge converter is proposed. The proposed converter has simple structure and wide duty cycle range, and therefore is suitable for applications such as fuel cells which have wide voltage variation. With the proposed asymmetrical PWM method the current rating of switch and transformer is significantly reduced compared to the conventional phase angle control method, and ZVZCS and synchronous rectification can also be achieved. This could result in high efficiency and high power density. The proposed converter is analytically compared to the conventional converter, and the proposed method was validated through the experiment.

• Proceedings of the KIPE Conference
• /
• 2012.11a
• /
• pp.193-194
• /
• 2012

The bidirectional boost-buck chopper type AC voltage regulator is presented in this paper. The main characteristic of the AC chopper is the fact that it generates an output AC voltage larger or lower than the input AC one, depending of the instantaneous duty-cycle. Boost-buck chopper type AC voltage regulator, derived from the DC chopper modulated method, is a kind of direct AC-AC voltage converter and has many advantages: such as fast response speed, low harmonics and high power factor. It adopts high switching frequency AC chopper technique and can do wide range step less AC voltage regulation.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.2
• /
• pp.152-156
• /
• 2013

This paper presents a fast-lock dual-loop successive approximation register-controlled duty-cycle corrector (SARDCC) circuit using a mixed (binary+sequential) search algorithm. A wider duty-cycle correction range, higher operating frequency, and higher duty-cycle correction accuracy have been achieved by utilizing the dual-loop architecture and the binary search SAR that achieves the fast duty-cycle correcting property. By transforming the binary search SAR into a sequential search counter after the first DCC lock-in, the proposed dual-loop SARDCC keeps the closed-loop characteristic and tracks variations in process, voltage, and temperature (PVT). The measured duty cycle error is less than ${\pm}0.86%$ for a wide input duty-cycle range of 15-85 % over a wide frequency range of 0.5-2.0 GHz. The proposed dual-loop SARDCC is fabricated in a 0.18-${\mu}m$, 1.8-V CMOS process and occupies an active area of $0.075mm^2$.

• Journal of Power Electronics
• /
• v.15 no.3
• /
• pp.652-659
• /
• 2015

This paper presents a new hybrid soft switching dc-dc converter with a low circulating current and high circuit efficiency. The proposed hybrid converter includes two sub-converters sharing two power switches. One is a three-level PWM converter and the other is a LLC converter. The LLC converter and the three-level converter share the lagging-leg switches and extend the zero-voltage switching (ZVS) range of the lagging-leg switches from nearly zero to full load since the LLC converter can be operated at f_sw (switching frequency) $\approx$ f_r (series resonant frequency). A passive snubber is used on the secondary side of the three-level converter to decrease the circulating current on the primary side, especially at high input voltage and full load conditions. Thus, the conduction losses due to the circulating current are reduced. The output sides of the two converters are connected in series. Energy can be transferred from the input voltage to the output load within the whole switching period. Finally, the effectiveness of the proposed converter is verified by experiments with a 1.44kW prototype circuit.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.7
• /
• pp.97-103
• /
• 2002

In this paper, a Logarithmic Video Amplifier(LVA) for radar system or satellite communications is described. The proposed LVA is composed of a input stage, amplification stage, and output stage. As well as a novel series-parallel architecture is proposed for the purpose of wide dynamic range and high speed operation, a newly developed input stage is designed in order to control the voltage level between LVA and detector diode. The LVA is fabricated with a 1.5um 2-poly 2-metal n-well Bi-CMOS technology, and the chip area is 1310 um x 1540 um. From the experimental results, it consumes 190 mW at 10V power supply, the chip has 60 dB dynamic range and 100ns falling time.

• Journal of IKEEE
• /
• v.27 no.3
• /
• pp.234-238
• /
• 2023

In this paper, we propose a time-to-digital converter (TDC) with compensation capability for PVT (process, voltage, and temperature) variations. A typical delay line-based TDC measures time based on the inverter's propagation delay, making it fundamentally sensitive to PVT variations. This paper presents a method to minimize the resolution change of TDC by compensating for the propagation delay caused by the PVT variations. Additionally, it dopts Cyclic Vernier TDC (CVTDC) structure to provide a wide input detection range. The proposed CVTDC with PVT compensation function is designed using a 45nm CMOS process, consumes 8mW of power, offers a TDC resolution of 5 ps, and has an input detection range of about 5.1 ns.

• Journal of Electrical Engineering and Technology
• /
• v.13 no.3
• /
• pp.1326-1336
• /
• 2018

This paper proposes a numerical approach to predict the critical flashover voltages of air gaps under lightning impulses. For an air gap, the impulse voltage waveform features and electric field features are defined to characterize its energy storage status before the initiation of breakdown. These features are taken as the input parameters of the predictive model established by support vector machine (SVM). Given an applied voltage range, the golden section search method is used to compute the prediction results efficiently. This method was applied to predict the critical flashover voltages of rod-rod, rod-plane and sphere-plane gaps over a wide range of gap lengths and impulse voltage waveshapes. The predicted results coincide well with the experimental data, with the same trends and acceptable errors. The mean absolute percentage errors of 6 groups of test samples are within 4.6%, which demonstrates the validity and accuracy of the predictive model. This method provides an effectual way to obtain the critical flashover voltage and might be helpful to estimate the safe clearances of air gaps for insulation design.

• Journal of Power Electronics
• /
• v.18 no.1
• /
• pp.266-276
• /
• 2018

This paper presents a new step-up and step-down multi-pulse auto-transformer rectifier unit (ATRU) topology. This structure can achieve a wide range of output voltages, which solves the problem of auto-transformer output voltage being difficult to regulate. Adding middle taps to the primary winding and reasonably setting the number of auto-transformer windings, constituted two groups of three-phase output voltages with a $30^{\circ}$ phase difference. Multi-pulse output DC voltage is obtained after a three-phase output voltage across two rectifier bridges and inter-phase reactor. Thus, the output DC voltage is related to the number and configuration of the auto-transformer winding. In this paper, the relationship between the voltage ratio of the auto-transformer and the ratio of winding, input current and auto-transformer kilovoltampere rating are deduced and validated by simulations. On this basis, the output voltage range is optimized. An experiment on two different voltage ratio principle prototypes was carried out to verify the correctness of the analysis design.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.4
• /
• pp.315-322
• /
• 2009

In the conventional boost converter, the actual duty cycle is limited as the output voltage increases due to increased voltage and current stress of the switch and diode and voltage surge caused by diode reverse recovery. In this paper a new non-isolated boost converter suitable for high gain applications is proposed. The proposed converter has voltage gain of around 6 when the duty cycle is 0.5. Since ZVS is achieved under CCM, the proposed converter has wide ZVS range. Also, voltage ratings of switch and diode are the same as one third of output voltage, and ratings of input and output passive components are reduced due to the interleaving. In addition voltage surge caused by diode reverse recovery is negligible due to ZCS turn-off of diodes. Operating principle of the proposed converter is described and validated through theoretical analysis, simulation and experiment.