• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.2039-2042
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• 2002

In this paper, we propose a technique used to simplify the trellis diagram, thus, reduce the complexity of Viterbi decoder in term of the number of Compare-Select (CS) operations needs in decoding process. It is shown that if the branch metrics are properly decomposed into orthogonal components. The trellis diagram can be modified that each original state with large number branches terminating to it can be broken into a number of sub-states having smaller number of branches terminating to them. Simulation results shown that the newly proposed technique can be used reduced the complexity of 8 and 16 PSK-TCMs without degrading the BER performance.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.739-742
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• 2000

In this paper, we evaluate the throughput and delay performance of a wireless Local Area Network(WLAN) employing the OFDM-based IEEE 802.lla Medium Access Control(MAC) protocol by compute. simulations under wireless indoor. channel. Packet Error Rate(PER) is also investigated for the various Eb/No. It is shown that, with soft-decision Viterbi decoder, throughput and delay performance are close to those of error-free channel at Eb/No above 8dB and PER is about 2${\times}$10$\^$-5/ at Eb/No=10dB.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2003.06a
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• pp.234-237
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• 2003

본 논문은 이동 통신 및 IEEE 802.lla WLAN에서 사용하고 있는 컨벌루셔널 부호의 복호기인 비터비 복호기의 SMU(Survivor Metric Unit)의 최적 메모리 제어에 관한 연구이다. 비터비 복호기기 구조는 크게 BMU, ACSU, SMU부로 구성된다. 이때 SMU부는 최적의 경로를 역추적 하여 최종 복호 데이터를 출력해 주는 블록으로, 역추적 길이에 따라 메모리 사용 양과 복호 성능이 좌우된다. 따라서 본 논문에서는 최적 메모리 제어 알고리즘을 제안함으로써 복호 속도의 향상과 메모리 사용 양을 줄이는 방법을 제안한다. 제안 알고리즘의 성능을 검증하기 위해 기존의 비터비 복호기와 역추적 길이에 따른 비터비 복호기의 성능을 실험을 통해 분석함으로써 제안 방법의 객관적인 성능을 분석한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2002.04b
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• pp.1627-1630
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• 2002

본 논문은 역추적 예견 알고리즘을 사용한 비터비 복호기에서의 TB단의 Polling 구조의 단순화 방법을 제시한다. 비터비 복호기의 3대 Unit중 하나인 Trace Back에서 역추적 예견 알고리즘을 사용할 경우 복호화 시점에서의 최소 State Metric 값을 찾아야 하는 번거로움을 줄일 수 있다. 하지만 복호 신호의 신뢰도 분산에 따라 Polling Unit 이 추가되어야 함에 따라 실제 하드웨어 복잡도에서의 이득은 미미한 것으로 알려져 있다. 제시된 구조에서는 Polling Unit을 단순화 할 수 있는 방법을 적용하였다. 기존 하드웨어와의 비교 평가를 위하여 IEEE802.11a의 표준에 따른 부호화율 1/2, 구속장 7을 갖는 비터비 디코더에 대하여 역추적 예견 알고리즘과 파이프라인 구조만을 갖는 경우와 제안된 단순화한 Polling Unit을 적용한 구조와의 비교에서 Trace Back Unit에서 약 45%의 감소 효과를 보였다.

• Proceedings of the Korea Institute of Convergence Signal Processing
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• 2000.08a
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• pp.77-80
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• 2000

본 논문은 IEEE 802.11a에 의해 규정되어진 데이터 율 12Mbps, 부호화 율 1/2, 구속장이 7인 무선LAN용 비터비 디코더를 설계하고 구현한다. 구현에 앞서 각 구속장에 따른 전달함수를 구하여 각 구속장 별 first event 에러 확률과 비트 에러 확률을 구한다. 4bit연성판정을 위해 입력 심볼을 16단계로 양자화 하였으며 역 추적을 위한 방식으로 메모리를 사용하는 대신 새로운 알고리듬을 적용한 레지스터 교환방식을 사용함으로써 majority voting을 가능하도록 하였다 고속의 데이터를 처리하기 위해 병렬구조를 갖는 설계를 FPGA 칩을 사용하여 구현하였고 AWGN 환경 하에서 성능검증을 하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7B
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• pp.1393-1399
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• 1999

In this paper, a VLSI design of the convolutional codec chip of code rate r=l/3, and constraint length K=9 is presented, which is able to correct errors of the received data when transmitted data is corrupted in channels. The circuit design mainly aimed for simple implementation. In the decoder, Viterbi algorithm with 3-bit soft-decision is employed. For information sequence updating and storage, the register exchange method is employed, where the register length is 5$\times$K(45 stages). The codec chip is designed using VHDL language and Design Analyzer and VHDL Simulator of Synopsys are used for simulation and synthesis. The chip is composed of ENCODER block, ALIGN block, BMC block, ACS block, SEL_MIN block and REG_EXCH block. The operation of the codec chip is verified though the logic simulations, where several error conditions are assumed. As a result of the timing simulation after synthesis, the decoding speed of 325.5Kbps is achieved, and 6,894 gates is used.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.10A
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• pp.1563-1570
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• 1999

This paper relates to the soft decision method with erasure technique in digital terrestrial television broadcasting system. The proposed decoder use the CSI derived from using the pilots in receiver. The active real(I) and imaginary(Q) data are transferred to the branch metric calculation block that decides the Euclidean distance for the soft decision decoding and also the estimated CSI values are transferred to the same block. After calculating the Euclidean distance for the soft decision decoding, the Euclidean distance of branch metric is multiplied by CSI. To do so, new branch metric values that consider each carrier state information are obtained. We simulated this method in better performance of about 0.15dB to 0.17dB and 2.2dB to 2.9dB in Rayleigh channel than that of the conventional soft decision Viterbi decoding with or without bit interleaver where the constellation is QPSK, 16-QAM and 64-QAM.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.9
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• pp.744-749
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• 2013

We propose soft user data input on LDPC codes with parity encoded by the (1, 7) run length limited (RLL) code for perpendicular magnetic recording channel. The user data are encoded by maximum transition run (MTR) (3;11) code. In order to minimize the loss of code rate, the (1, 7) RLL code only encode the parity of LDPC. Also, to increase performance, we propose only user data part applied soft output Viterbi algorithm (SOVA). The performance using the SOVA showed good performance lower than 26 dB. In contrast, it showed worse performance high than 26 dB. This is because of incorrect soft information by high jitter noise and two different input types for LDPC decoder.

• Journal of Navigation and Port Research
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• v.39 no.4
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• pp.293-297
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• 2015

Underwater acoustic communications has been limited use for military purposes in the past. However, the fields of underwater applications expend to detection, submarine and communication in recent. The excessive multipath encountered in underwater acoustic communication channel is creating inter symbol interference, which is limiting factor to achieve a high data rate and bit error rate performance. To improve the performance of a received signal in underwater communication, many researchers have been studied for channel coding scheme with excellent performance at low SNR. In this paper, we applied BCJR decoder based ( 2,1,7 ) convolution codes and to compensate for the distorted data induced by the multipath, we applying the turbo equalization method. Through the underwater experiment on the Gyeungcheun lake located in Mungyeng city, we confirmed that turbo equalization structure of BCJR has better performance than hard decision and soft decision of Viterbi decoding. We also confirmed that the error rate of decoder input is less than error rate of $10^{-1}$, all the data is decoded. We achieved sucess rate of 83% through the experiment.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.3
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• pp.229-235
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• 2019

The implementation of an in-band full-duplex wireless communication system is demonstrated in this study. In the analog/RF domain, the self-interference(SI) signal is reduced using a separate antenna for the transmitter and receiver paths, and most of the SI signal is canceled in the digital domain. A software defined radio(SDR) is used to implement the in-band full-duplex wireless communication system. The USRP X310 device uses transmitting and receiving antennas. By adjusting the gain of the transmitting and receiving ends of the SDR device, the magnitude of the SI signal entering the receiving antenna, and the size of the received signal from the outside, are both set to -64 dB. To verify the in-band full-duplex wireless communication performance, the source data is image and orthogonal frequency-division multiplexing is used for modulation. A WiFi standard frame with a carrier frequency of 2.67 GHz and bandwidth of 20 MHz is used. In the received signal, the SI signal is canceled by digital signal processing and the SI signal is attenuated by up to 34 dB. OFDM demodulation was impossible when the SI signal was not removed. However, the bit error rate is reduced to $2.63{\times}10^{-5}$ when the SI signal is attenuated by 34 dB, and no error is detected in the 100 Mbit data output as a result of passing through the Viterbi decoder.