• Title/Summary/Keyword: Viterbi

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Viterbi Core Development Using Non-linear Equalizer (비선형 등화기를 이용한 적응형 Viterbi 코어 개발에 관한 연구)

  • 배주한;박현수;김민철;심재성
    • Proceedings of the IEEK Conference
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    • 2003.11a
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    • pp.465-468
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    • 2003
  • 본 논문에서는 광 저장장치의 기록밀도가 증가할 경우 발생하는 여러 가지 문제점들에 대응하는 PRML 시스템 구현 방법을 제안하고 기존의 시스템의 성능과 제안된 시스템의 성능을 비교한다. 기존의 채널 적응기법 및 비터비 복호화기에 대비해 보다 종은 성능을 가지는 구조의 비선형 등화방식과 비터비 예상 레벨 적응 알고리즘을 이용한 새로운 구조를 제안하고, 23Gbyte 저장용량을 가지는 Blu-ray 디스크에 28GB의 데이터를 기록하여 기록 기록밀도가 증가한 실제 디스크에 대한 실험 결과에 대하여 논한다.

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VLSI Design of SOVA Decoder for Turbo Decoder (터보복호기를 위한 SOVA 복호기의 설계)

  • Kim, Ki-Bo;Kim, Jong-Tae
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.3157-3159
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    • 2000
  • Soft Output Viterbi Algorithm is modification of Viterbi algorithm to deliver not only the decoded codewords but also a posteriori probability for each bit. This paper presents SOVA decoder which can be used for component decoder of turbo decoder. We used two-step SMU architectures combined with systolic array traceback methods to reduce the complexity of the design. We followed the specification of CDMA2000 system for SOVA decoder design.

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A pipeline synthesis for a trace-back systolic array viterbi decoder (역추적 시스토릭 어레이 구조 비터비 복호기의 파이프라인 합성)

  • 정희도;김종태
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.3
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    • pp.24-31
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    • 1998
  • This paper presents a pipeline high-level synthesis tool for designing trace-back systolic array viterbi decoder. It consists of a dta flow graph(DFG) generator and a pipeline data path synthesis tool. First, the DFG of the vitrebi decoder is generated in the from of VHDL netlist. The inputs to the DFG generator are parameters of the convolution encoder. Next, the pipeline scheduling and allocationare performed. The synthesis tool explores the design space efficiently, synthesizes various designs which meet the given constraints, and choose the best one.

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Speaker Adaptation in HMM-based Korean Isoklated Word Recognition (한국어 격리단어 인식 시스템에서 HMM 파라미터의 화자 적응)

  • 오광철;이황수;은종관
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.40 no.4
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    • pp.351-359
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    • 1991
  • This paper describes performances of speaker adaptation using a probabilistic spectral mapping matrix in hidden-Markov model(HMM) -based Korean isolated word recognition. Speaker adaptation based on probabilistic spectral mapping uses a well-trained prototype HMM's and is carried out by Viterbi, dynamic time warping, and forward-backward algorithms. Among these algorithms, the best performance is obtained by using the Viterbi approach together with codebook adaptation whose improvement for isolated word recognition accuracy is 42.6-68.8 %. Also, the selection of the initial values of the matrix and the normalization in computing the matrix affects the recognition accuracy.

A Design of Parameterized Viterbi Decoder using Hardware Sharing (하드웨어 공유를 이용한 파라미터화된 비터비 복호기 설계)

  • Park, Sang-Deok;Jeon, Heung-Woo;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2008.05a
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    • pp.93-96
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    • 2008
  • This paper describes an efficient design of a multi-standard Viterbi decoder that supports multiple constraint lengths and code rates. The Viterbi decode. is parameterized for the code rates 1/2, 1/3 and constraint lengths 7, 9, thus it has four operation modes. In order to achieve low hardware complexity and low power, an efficient architecture based on hardware sharing techniques is devised. Also, the optimization of ACCS (Accumulate-Subtract) circuit for the one-point trace-back algorithm reduces its area by about 35% compared to the full parallel ACCS circuit. The parameterized Viterbi decoder core has 79,818 gates and 25,600 bits memory, and the estimated throughput is about 105 Mbps at 70 MHz clock frequency.

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Novel Viterbi Decoding Architecture for DVB-T with Improved Performance in Rayleigh Channels (레일레이 채널에서 성능 향상을 위한 DVB-T용 비터비 디코더의 아키텍쳐)

  • Oh, Jung-Youn;Park, Kyu-Hyun;Lee, Seung-Jun
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.39 no.6
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    • pp.718-726
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    • 2002
  • This paper presents a novel Viterbi decoding architecture for European Digital Video Broadcasting (DVB) receiver. The channel sate information (CSI) of each sub carrier is used to weight the bit-metric of each symbol. The weighted bit-metric is delivered to Viterbi decoder after going through the symbol deinterleaver and bit deinterleaver, such that the CSI can be correctly applied to corresponding bits even after the two interleavings. Simulation shows that the new architecture gives significant performance enhancement of 6~13dB in Rayleigh fading channels depending on the modulation types. This results is also better than previous results by 3.7~10.3dB.

A Study on the Korean Broadcasting Speech Recognition (한국어 방송 음성 인식에 관한 연구)

  • 김석동;송도선;이행세
    • The Journal of the Acoustical Society of Korea
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    • v.18 no.1
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    • pp.53-60
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    • 1999
  • This paper is a study on the korean broadcasting speech recognition. Here we present the methods for the large vocabuary continuous speech recognition. Our main concerns are the language modeling and the search algorithm. The used acoustic model is the uni-phone semi-continuous hidden markov model and the used linguistic model is the N-gram model. The search algorithm consist of three phases in order to utilize all available acoustic and linguistic information. First, we use the forward Viterbi beam search to find word end frames and to estimate related scores. Second, we use the backword Viterbi beam search to find word begin frames and to estimate related scores. Finally, we use A/sup */ search to combine the above two results with the N-grams language model and to get recognition results. Using these methods maximum 96.0% word recognition rate and 99.2% syllable recognition rate are achieved for the speaker-independent continuous speech recognition problem with about 12,000 vocabulary size.

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Performance of Two-Dimensional Soft Output Viterbi Algorithm for Holographic Data Storage (홀로그래픽 저장장치를 위한 2차원 SOVA 성능 비교)

  • Kim, Jinyoung;Lee, Jaejin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37A no.10
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    • pp.815-820
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    • 2012
  • We introduce two-dimensional soft output Viterbi algorithm (2D SOVA) and iterative 2D SOVA for holographic data storage. Since the holographic data storage is 2D intersymbol interference (ISI) channel, the 2D detection schemes have good performance at holographic data storage. The 2D SOVA and iterative 2D SOVA are 2D detection schemes. We introduce and compare the two 2D detection schemes. The 2D SOVA is approximately 2 dB better than one-dimensional (1D) detection scheme, and iterative 2D SOVA is approximately 1 dB better than the 2D SOVA. In contrast, the iterative 2D SOVA is approximately twice complex higher than 2D SOVA, and 2D SOVA is approximately twice complex higher than 1D detection scheme.

A Study of Efficient Viterbi Equalizer in FTN Channel (FTN 채널에서의 효율적인 비터비 등화기 연구)

  • Kim, Tae-Hun;Lee, In-Ki;Jung, Ji-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.6
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    • pp.1323-1329
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    • 2014
  • In this paper, we analyzed efficient decoding scheme with FTN (Faster than Nyquist) method that is transmission method faster than Nyquist theory and increase the throughput. we proposed viterbi equalizer model to minimize ISI (Inter-Symbol Interference) when FTN signal is transmitted. the proposed model utilized interference as branch information. In this paper, to decode FTN singal, we used turbo equalization algorithms that iteratively exchange probabilistic information between soft Viterbi equalizer (BCJR method) and LDPC decoder. By changing the trellis diagram in order to maximize Euclidean distance, we confirmed that performance was improved compared to conventional methods as increasing throughput of FTN signal.

Implementation of a Viterbi decoder operated in 4 Dimensional PAM-5 Signal of 1000Base-T (1000BASE-T의 4조 PAM-5 신호 상에서 동작하는 비터비 디코더의 구현)

  • Jung, Jae-Woo;Chung, Hae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.7
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    • pp.1579-1588
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    • 2014
  • The LAN method is the most widely used in domestic high-speed internet access and rapidly moving to 1 Gbps Ethernet from 100 Mbps one to provide high-speed services such as UHD TV. The 1000BASE-T PHY with 4 pairs UTP transmits a PAM-5 signal at the 125 MHz clock per each pair to achieve 1 Gbps rate. In order to correct errors over the channel, the transmitter uses a TCM which is combined the convolutional encoder and PAM-5, and the receiver uses the Viterbi decoder. In this paper, we implement a Viterbi decoder which can correct two pair errors and operate at the least 125 MHz clock speed. Finally, we will verify the error correction function and the operating speed of the implemented decoder with a logic analyzer.