• Journal of the Korea Academia-Industrial cooperation Society
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• 제9권5호
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• pp.1139-1144
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• 2008

In this paper, we propose an automatic generation method of transaction level(TL) model from algorithmic model to verify system specification fast and effectively using virtual platform. The TL virtual platform including structural properties such as timing, synchronization and real-time is one of the effective verification frameworks. However, whenever change system specification or HW/SW mapping, we must rebuild virtual platform and additional design/verification time is required. And the manual description is very time-consuming and error-prone process. To solve these problems, we build TL library which consists of basic components of virtual platform such as CPU, memory, timer. We developed a set of design/verification tools in order to generate a virtual platform automatically. Our tools generate a virtual platform which consists of embedded real-time operating system (RTOS) and hardware components from an algorithmic modeling. And for communication between HW and SW, memory map and device drivers are generated. The effectiveness of our proposed framework has been successfully verified with a Joint Photographic Expert Group (JPEG) and H.264 algorithm. We claim that our approach enables us to generate an application specific virtual platform $100x{\tims}1000x$ faster than manual designs. Also, we can refine an initial platform incrementally to find a better HW/SW mapping. Furthermore, application software can be concurrently designed and optimized as well as RTOS by the generated virtual platform

• Journal of the Korea Institute of Information Security & Cryptology
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• 제31권4호
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• pp.617-635
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• 2021

Internet of Things (IoT) devices connected to the network without appropriate security solutions have become a serious security threat to ICT infrastructure. Moreover, due to the nature of IoT devices, it is difficult to apply currently existing security solutions. As a result, IoT devices have easily become targets for cyber attackers, and malware attacks on IoT devices are actually increasing every year. Even though several security solutions are being developed to protect IoT infrastructure, there is a great risk to apply unverified security solutions to real-world environments. Therefore, verification tools to verify the functionality and performance of the developed security solutions are also needed. Furthermore, just as security threats vary, there are several security solution s that defend against them, requiring suitable verification tools based on the characteristics of each security solution. In this paper, we propose an high-speed malware propagation tool that spreads malware at high speed in the IoT infrastructure. Also, we can verify the functionality of the security solution that detect and quickly block attacks spreading in IoT infrastructure by using the high-speed malware propagation tool.

• Journal of Broadcast Engineering
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• 제12권3호
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• pp.214-221
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• 2007

In this paper, we presents conformance test tools for the broadcast web site (BWS) service which is one of the data services for terrestrial digital multimedia broadcasting (T-DMB). First, the methodology for the conformance test is established for both transmitters and receivers of T-DMB BWS services. The test tools consist of three parts: BWS bitstream analyzer, BWS reference decoder (software) module, and BWS test bitstreams. For testing transmitted BWS bitstreams, we developed the bitstream analyzer. For testing BWS receivers, we developed the reference Ifecoder module and created the test bitstreams. Actually the bitstream analyzer developed in this paper was used for the verification of the test bitstreams. The same test bitstreams are fed to a BWS decoder module under test and the reference decoder module and the results from the two are compared for verification. The test tools can be used for the test of all the protocol and textual/image specifications related to BWS including MOT protocol, HTML, PNG, MNG, JPEG, and Ecma Script.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2004년도 하계종합학술대회 논문집(2)
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• pp.585-588
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• 2004

This paper describes design and verification of the motion estimation and compensation unit using full search algorithm. Video processor is the key device of video communication systems. Motion estimation is the key module of video processor. The technologies of motion estimation and compensation unit are the core technologies for wireless video telecommunications system, portable multimedia systems. In this design, Verilog simulator and logic synthesis tools are used for hardware design and verification. In this paper, motion estimation and compensation unit are designed using FPGA, coded in Verilog HDL, and simulated and verified using Xilinx FPGA.

• The Transactions of the Korean Institute of Electrical Engineers P
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• 제57권2호
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• pp.65-71
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• 2008

Recently, many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased. assurance for such applications. Earlier error of overlooked requirement specification can be detected using formal specification method. Also the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we propose an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM' which is formal method tools using Statechart for applying to the railway signaling systems.

• Journal of Electrical Engineering and Technology
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• 제4권1호
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• pp.87-92
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• 2009

Many critical control systems are developed using formal methods. When software applied to such systems is developed, the employment of formal methods in the software requirements specification and verification will provide increased assurance for such applications. Earlier errors of overlooked requirement specification can be detected using the formal specification method. Also, the testing and full verification to examine all reachable states using model checking to undertake formal verification are able to be completed. In this paper, we proposed an eclectic approach to incorporate Z(Zed) formal language and 'Statemate MAGNUM', formal method tools using Statechart. Also we applied the proposed method to train control systems for the formal requirement specification and analyzed the specification results.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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• pp.450-450
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• 2000

This paper presents a software design simulation method for controlling multiple mechanism carrier system (MMCS), which is mainly used in a wrapping machine or a case packing machine. This method uses a mechanical tool-work interactive model proposed in this paper, in order to represent the interactive behaviors between some tools and a work driven by their tools, in which low effect states of a work are defined. Based on this method, a 3-D simulation system has been built. It consists of shape modeling of each device, behavior definitions of tools, and control logic using if-then expression. By applying it to a ase packing machine having about 30 mechanical devices and 100 inputs/outputs for control, the effectiveness of this method has been shown in general verification of control logic specification in an early software design phase and the possibility of smooth communication tool between mechanical and software designers.

• Journal of Electrical Engineering and Technology
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• 제10권5호
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• pp.2083-2088
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• 2015

The transient characteristics of the tri-axial High Temperature Superconducting (HTS) power cable are different from those of a conventional power cable depending on whether the cable is under a steady or transient state due to the quench. Verification using simulation tools is required to confirm both the characteristics of the cable and the effect of the cable when it is applied to a real utility. However, a component for the cable has not been provided in simulation tools; thus the RTDS-based model component of the tri-axial HTS power cable was developed, and a simulation was performed under the transient state. The considered properties of model component include resistance, reactance and temperature. Simulation results indicate the variation of HTS power cable condition. The results are used for the transient characteristic analysis and stability verification of the tri-axial HTS power cable. In the future, the RTDS-based model component of the cable will be used to implement the hardware-in-the-loop simulation with a protection device.

• The Journal of Economics, Marketing and Management
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• 제11권4호
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• pp.31-39
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• 2023

Purpose: This study attempted to systematize a support system that can enhance teaching core competencies by establishing a scale for diagnosing teaching core competencies at University A. Research design, data and methodology : To this end, the first Delphi was conducted With six experts related to university core competency modeling research by extracting factors and designing structured questionnaires through a literature review process that collects and analyzes prior research related to domestic and foreign university teaching competency. The derived questions were diagnosed on 27 professors, and independent sample t-verification and ANOVA were conducted using SPSS 24.0 for analysis by key teaching competency factors. Result: What is the standard suitability of KMO. It was shown as 929 (KMO standard conformity value is close to 1), and Barlett's sphericity verification showed χ2=5773.295, df=1081, p<.It appeared as 001 and confirmed that it was suitable for conducting factor analysis. Conclusions: The core competencies of A University teachers were set based on the educational goals of A University, such as basic teaching competency, creative teaching competency, practical teaching competency, and communication teaching competency. This means that the concept and factors of the core competency of professors are likely to change, and in the end, continuous efforts to upgrade and apply research on core competency of professors are essential to quickly and organically respond to changes in competency required to increase the competitiveness of universities.

• Journal of the Korea Society of Computer and Information
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• 제27권5호
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• pp.109-116
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• 2022

Recently, a model-based development method centered on highly readable and standardized UML (Unified Modeling Language) models has been applied to solve unclear communications in large-scale software development. However, it is difficult to apply consistent UML models depending on software developers' proficiency, understanding of models and modeling tools. In this paper, we propose a method for developing a Model Verification System to apply an consistent UML model to software development. Then, the developed Model Verification System is partially applied to the Naval Combat System Software development to prove its function. The Model Verification System provides automatic verification of models created by developers according to domain characteristics. If the Model Verification System proposed in this paper is used, It has the advantage of being able to apply the consistent UML model more easily to Naval Combat System Software Development.