• Title/Summary/Keyword: Vector-Processor

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Real-Time Hardware Simulator for Grid-Tied PMSG Wind Power System

  • Choy, Young-Do;Han, Byung-Moon;Lee, Jun-Young;Jang, Gil-Soo
    • Journal of Electrical Engineering and Technology
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    • v.6 no.3
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    • pp.375-383
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    • 2011
  • This paper describes a real-time hardware simulator for a grid-tied Permanent Magnet Synchronous Generator (PMSG) wind power system, which consists of an anemometer, a data logger, a motor-generator set with vector drive, and a back-to-back power converter with a digital signal processor (DSP) controller. The anemometer measures real wind speed, and the data is sent to the data logger to calculate the turbine torque. The calculated torque is sent to the vector drive for the induction motor after it is scaled down to the rated simulator power. The motor generates the mechanical power for the PMSG, and the generated electrical power is connected to the grid through a back-to-back converter. The generator-side converter in a back-to-back converter operates in current control mode to track the maximum power point at the given wind speed. The grid-side converter operates to control the direct current link voltage and to correct the power factor. The developed simulator can be used to analyze various mechanical and electrical characteristics of a grid-tied PMSG wind power system. It can also be utilized to educate students or engineers on the operation of grid-tied PMSG wind power system.

Design of Core of MPEG Decoder for Object-Oriented Video on Network (네트워크 기반 객체 지향형 영상 처리를 위한 MPEG 디코더 코어 설계)

  • 박주현;김영민
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.2120-2130
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    • 1998
  • This paper concerns a design of programmable MPEG decoder for video processing by object unit on network. The decoder can process video data effectively by a embedded controller with stack buffers for supporting OOP (Object-Oriented Programming). The controller offers extended instructions that process several data types including 32bit integer type. In addition to that, we have a vector processor, in this decoder that can execute advanced compensation and prediction by half pixel and SA(Shape Adaptive)-IDCT of MPEG-4. Absolutors and halfers in the vector processor make this architecture extensive to a encoder. We verified the decoder with $0.6\mu\textrm{m}$ 5-Volt CMOS COMPASS library.

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Design of a BLDC Servo Motor Control System for the Auto Process of Assembly and Supply (자동 조립 및 공급을 위한 BLDC 서보 전동기 제어시스템 설계)

  • Sim, Dong-Seok;Choi, Jung-Keyng
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.5
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    • pp.1095-1101
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    • 2012
  • This paper presents a design of a BLDC servo motor control system for the auto process of assembly and supply using DSP(Digital Signal Processor) controller and IGBT driver. The assembly and supply auto processing system needs torque, speed, position control of servo motor for variable action. This paper implements those servo control with vector control and space vector PWM(Pulse Width Modulation) technique. As CPU of controller, TMS320F240 DSP was adopted because it has PWM waveform generator, A/D converter, SPI(Serial Peripheral Interface) port and many input/output port etc. This control system consists of 3-level hierarchy structure that main host PC manages three sub DSP system which transfer downward command and are monitoring the states of end servo controllers. Each sub DSP system operates eight BLDC servo controllers which control BLDC motor using DSP and IPM. Between host system and sub DSP communicate with RS-422, between main processor and controller communicate with SPI port.

Sensorless Control of a PMSM at Low Speeds using High Frequency Voltage Injection

  • Yoon Seok-Chae;Kim Jang-Mok
    • Journal of Power Electronics
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    • v.5 no.1
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    • pp.11-19
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    • 2005
  • This paper describes the two control techniques to perform the sensorless vector control of a PMSM by injecting the high frequency voltage to the stator terminal. The first technique is the estimation algorithm of the initial rotor position. A PMSM possesses the saliency which produces the ellipse of the stator current when the high frequency voltage is injected into the motor terminal. The major axis angle of the current ellipse gives the rotor position information at a standstill. The second control technique is a sensorless control algorithm that injects the high frequency voltage to the stator terminal in order to estimate the rotor position and speed. The rotor position and speed for sensorless vector control is calculated by appropriate signal processing to extract the position information from the stator current at low speeds or standstill. The proposed sensorless algorithm using the double-band hysteresis controller exhibits excellent reference tracking and increased robustness. Experimental results are presented to verify the feasibility of the proposed control schemes. Speed, position estimation and vector control were carried out on the floating point processor TMS320VC33.

Implementation of Compact Vector Control System for Induction Motor Using TMS320F2812 DSP and Smart Power Module (TMS320F2812 DSP와 스마트 파워모듈을 사용한 유도전동기 소형 벡터제어 시스템의 구현)

  • Lim Jeong-Gyu;Kim Seok-Hwan;Chung Se-Kyo
    • Proceedings of the KIPE Conference
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    • 2004.07a
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    • pp.11-14
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    • 2004
  • This paper presents an implementation of compact vector control system for induction motor using a digital signal processor (DSP) and a smart power module (SPM). The DSP TMS320F2812 has most necessary functions for ac motor control in a single chip and SPM provides a compact power stage. The indirect vector control algorithm is implemented in the drive system using these devices. The developed system is applied by 0.8kW induction servo motor and the all functions are verified through the experiments.

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New Three-Phase Multilevel Inverter with Shared Power Switches

  • Ping, Hew Wooi;Rahim, Nasrudin Abd.;Jamaludin, Jafferi
    • Journal of Power Electronics
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    • v.13 no.5
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    • pp.787-797
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    • 2013
  • Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

Design of Vector Register Architecture in DSP Processor for Efficient Multimedia Processing

  • Wu, Chou-Pin;Wu, Jen-Ming
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.229-234
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    • 2007
  • In this paper, we present an efficient instruction set architecture using vector register file hardware to accelerate operation of general matrix-vector operations in DSP microprocessor. The technique enables in-situ row-access as well as column access to the register files. It can reduce the number of memory access significantly. The technique is especially useful for block-based video signal processing kernels such as FFT/IFFT, DCT/IDCT, and two-dimensional filtering. We have applied the new instruction set architecture to in-loop deblocking filter processing in H.264 decoder. Performance comparisons show that the required load/store operations for the in-loop deblocking filter can be reduced about 42%. The architecture would improve the processing speed, and code density in DSP microprocessor especially for video signal processing substantially.

비점성 압축성 코드의 병렬화 기법에 의한 슈퍼컴퓨터 CRAY T3E의 성능 분석

  • Go Deok-Gon
    • 한국전산유체공학회:학술대회논문집
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    • 1997.10a
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    • pp.17-22
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    • 1997
  • The performances of the CRAYT3E and CRAYC90 were compared in the point of aerodynamics. The CRAYC90 with and without the highest vector option was run, respectively. The CRAYT3E was run with various processors (from 1pe to 32pes). The communication utilities of MPI and SHMEM were used to inform the boundary data to the other processors. The DADI Euler solver, which is implicit scheme and use central difference method, was used. The domain decomposition method was also used. As the result, the CRAYC90 with the highest vector option is 5.7 times faster than the CRAYT3E with 1 processor. However, because of the scalability of the CRAYT3E, the CRAYT3E with more than 6 processors is faster than CRAYC90. In case that 32 processors used, the CRAYT3E is 6 times faster than CRAYC90 with the highest vector option.

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A Vector Instruction-based RISC Architecture for a Photovoltaic System Monitoring Camera

  • Choi, Youngho;Ahn, Hyungkeun
    • Transactions on Electrical and Electronic Materials
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    • v.13 no.6
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    • pp.278-282
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    • 2012
  • Photovoltaic systems have emerged to be one of the cleanest energy systems. Therefore, many large scale solar parks and PV farms have been built to prepare for the post fossil fuel ages. However, due to their large scale, to efficiently manage and operate PV systems, they need to be visually monitored within the range of infrared ray through the Internet. To satisfy this need, the efficient implementation of a high performance video compression standard is required. This paper therefore presents an implementation of H.264 motion estimation, which is one of the most data-intensive and complicated functions in H.264. To achieve this, this work implements vector instructions in hardware and incorporates them in a generic RISC processor architecture, thus increasing the processing speed while minimizing hardware and software design efforts. Extensive simulation results show that this proposed implementation can process motion estimations up to 13 times faster.

Design of Speed Controller System for PM Linear Synchronous Motor using the Space Vector modulation (공간 벡터를 이용한 직선형 동기 전동기의 비간섭 속도 제어 시스템 설계)

  • Jang Seok-Myeong;You Dae-Joon;Jang Won-Bum;Park Ji-Hoon
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.857-859
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    • 2004
  • This paper presents design of speed control system for slot less air-cored PM linear synchronous motor using space vector PWM. The vector control requires information about rotor position. And we can need to the Hall sensor for sampling current. In order to agree with this purpose, Digital Signal Processor(TMS320F2406A) developed for implementation of a speed Field Oriented Control.

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