• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.30 no.1
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• pp.88-94
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• 2019

A leakage canceller and adaptive algorithm for FMCW Radar is presented. Because a strong leakage signal causes various problems in the transceiver and digital processor, specific FMCW radars are in need of a leakage canceller. The leakage canceller has an adaptive structure and the algorithm calculates the prediction vector and learns the adaptive coefficient simultaneously. The proposed algorithm an improvement of 10 dB in the cancellation performance.

• Proceedings of the Korea Information Processing Society Conference
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• 2011.04a
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• pp.530-533
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• 2011

방사형 그라디언트 페인트(radial gradient paint)는 벡터 그래픽스(vector graphics)에서 적은 정보로 다양한 효과를 적용시킬 수 있는 방법이다. 기본적으로 이 방법은 곱하기, 나누기, 제곱근 등의 복잡한 연산이 필요하기 때문에 모바일 같은 저성능 환경에 적합하지 않았다. 하지만 최근 모바일 기기들은 SIMD 연산 지원 및 고성능의 GPU 탑재 등으로 성능이 향상됨에 따라 이러한 문제를 해결할 수 있게 되었다. 본 논문은 ARM의 SIMD연산인 NEON을 이용하여 최대 2.6배의 성능을 가속시켰으며 GPU의 쉐이더를 이용하여 4.9배의 성능을 가속하였다.

• The Bulletin of The Korean Astronomical Society
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• v.44 no.2
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• pp.71.1-71.1
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• 2019

The solar magnetic field comes from the solar interior and is related to various phenomena on the Sun. To understand this process, many studies have been conducted to produce its evolution using a single flux rope. In this study, we are interested in the emergence of two flux ropes and their evolution, which takes longer than the emergence of a single flux rope. To construct it, we develop a flux emergence simulation by applying a parallel computing to reduce a computation time in a wider domain. The original simulation code had been written in Fortran 77. We modify it to a version of Fortran 90 with Message Passing Interface (MPI). The results of the original and new simulation are compared on the NEC SX-Aurora TSUBASA which is a vector engine processor. The parallelized version is faster than running on a single core and it shows a possibility to handle large amounts of calculation. Based on this model, we can construct a complex flux emergence system, such as an evolution of two magnetic flux ropes.

• International Journal of Computer Science & Network Security
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• v.24 no.1
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• pp.107-118
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• 2024

With the seamless growth of the technology, network usage requirements are expanding day by day. The majority of electronic devices are capable of communication, which strongly requires a secure and reliable network. Network-based intrusion detection systems (NIDS) is a new method for preventing and alerting computers and networks from attacks. Machine Learning is an emerging field that provides a variety of ways to implement effective network intrusion detection systems (NIDS). Bagging and Boosting are two ensemble ML techniques, renowned for better performance in the learning and classification process. In this paper, the study provides a detailed literature review of the past work done and proposed a novel ensemble approach to develop a NIDS system based on the voting method using bagging and boosting ensemble techniques. The test results demonstrate that the ensemble of bagging and boosting through voting exhibits the highest classification accuracy of 99.98% and a minimum false positive rate (FPR) on both datasets. Although the model building time is average which can be a tradeoff by processor speed.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.1
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• pp.58-66
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• 2009

In this paper, vector control to applied disturbance offset feedforward loop control for changing disturbances with various mechanical parameter is suggested. The proposed system estimate load torque based on induction motor torque using minimum diemension state observer. Because speed controller using state observer is used on condition of feedforward loop fur a torque, the robust speed control system realized. In this study, the proposed paper does to heighten reliability of system by presuming and use the speed by voltage and current that is detected without speed sensor. To prove the propriety of this paper, the various simulation carried out adequacy using a Matlab Simulink, and at the same time real system is made, using a ADMC300 digital signal processor, so it is proved. As the experimental result of embodying the system, the robust system is realized.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.10a
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• pp.897-900
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• 2007

This paper presents a study on the DSP controller and IGBT inverter driver design for the power-by-wire(PBW) system using BLDC servo motor. This BLDC servo motor system was realized with DSP(Digital Signal Processor) and IGBT inveter module. The PBW system needs speed control of servo motor for linear thrust action. This paper implements a servo controller with vector control and min-max PWM technique. As CPU of controller, TMS320F2812 DSP was adopted because it has PWM(Pulse Width Modulation) waveform generator, A/D(Analog to Digital) converter, SPI( Serial Peripheral Interface) port and many input/output port etc.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.4
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• pp.424-434
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• 2015

Adaptive beamforming algorithms have been widely used to remove interference and jamming in the phased array radar system. Advances in the field programmable gate array(FPGA) technology now make possible the real time processing of adaptive beamforming (ABF) algorithm. In this paper, the FPGA based real-time implementation method of adaptive beamforming system(beamformer) in the pre-processor module for active electronically scanned array(AESA) radar is proposed. A compact FPGA-based adaptive beamformer is developed using commercial off the shelf(COTS) FPGA board with communication via OpenVPX(Virtual Path Cross-connect) backplane. This beamformer comprises a number of high speed complex processing including QR decomposition & back substitution for matrix inversion and complex vector/matrix calculations. The implemented result shows that the adaptive beamforming patterns through FPGA correspond with results of simulation through Matlab. And also confirms the possibility of application in AESA radar due to the real time processing of ABF algorithm through FPGA.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.2
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• pp.138-147
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• 2005

This paper presents a SPMSM(Surface-mounted Permanent Magnet Synchronous Motor) servo drive system using high performance TMS320F2812 DSP for the industrial application. The DSP(Digital Signal Processor) Controller enables an enhanced real time algorithm and cost-effective design intelligent for only exclusively motor drives which can be yield enhanced operation, fewer system components, lower control system cost, increased efficiency and high performance. The suggested system contain speed and current sensing circuits, SVPWM(Space Vector Pulse Width Modulation) and I/O interface circuit. The developed servo drive control system showns a good response characteristics results and high performance features in general purposed 400[w] machine. This system can achieve cost reduction and size minimization of controllers.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.47 no.6
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• pp.137-145
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• 2010

Digital vessel have to accurate and efficient mange the digital data from various sensors in the digital vessel. But, In sensor network, it is difficult to transmit and analyze the entire stream data depending on limited networks, power and processor. Therefore it is suitable to use alternative stream data processing after classifying the continuous stream data. In this paper, We propose efficient processing method that arrange some sensors (temperature, humidity, lighting, voice) and process query based on sliding window for efficient input stream and pre-clustering using multiple Support Vector Machine(SVM) algorithm and manage hash table to summarized information. Processing performance improve as store and search and memory using hash table and usage reduced so maintain hash table in memory. We obtained to efficient result that accuracy rate and processing performance of proposal method using 35,912 data sets.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.11
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• pp.56-62
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• 2008

Modern microprocessors must deliver high application performance, while the design process should not subordinate power. In terms of performance and power tradeoff, the instructions window is particularly important. This is because a large instruction window leads to achieve high performance. However, naive scaling conventional instruction window can severely affect the complexity and power consumption. This paper explores an architecture level approach to reduce power dissipation. We propose a low power issue logic with an efficient tag translation. The direct lookup table (DTL) issue logic eliminates the associative wake-up of conventional instruction window. The tag translation scheme deals with data dependencies and resource conflicts by using bit-vector based structure. Experimental results show that, for SPEC2000 benchmarks, the proposed design reduces power consumption by 24.45% on average over conventional approach.