• Title/Summary/Keyword: Vector Architecture

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A Self Creating and Organizing Neural Network (자기 분열 및 구조화 신경회로망)

  • 최두일;박상희
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.41 no.5
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    • pp.533-540
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    • 1992
  • The Self Creating and Organizing (SCO) is a new architecture and one of the unsupervized learning algorithm for the artificial neural network. SCO begins with only one output node which has a sufficiently wide response range, and the response ranges of all the nodes decrease automatically whether adapting the weights of existing node or creating a new node. It is compared to the Kohonen's Self Organizing Feature Map (SOFM). The results show that SCONN has lots of advantages over other competitive learning architecture.

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Test Vector Generator of timing simulation for 224-bit ECDSA hardware (224비트 ECDSA 하드웨어 시간 시뮬레이션을 위한 테스트벡터 생성기)

  • Kim, Tae Hun;Jung, Seok Won
    • Journal of Internet of Things and Convergence
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    • v.1 no.1
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    • pp.33-38
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    • 2015
  • Hardware are developed in various architecture. It is necessary to verifying value of variables in modules generated in each clock cycles for timing simulation. In this paper, a test vector generator in software type generates test vectors for timing simulation of 224-bit ECDSA hardware modules in developing stage. It provides test vectors with GUI format and text file format.

An Architecture of Vector Processor Concept using Dimensional Counting Mechanism of Structured Data (구조성 데이터의 입체식 계수기법에 의한 벡터 처리개념의 설계)

  • Jo, Yeong-Il;Park, Jang-Chun
    • The Transactions of the Korea Information Processing Society
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    • v.3 no.1
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    • pp.167-180
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    • 1996
  • In the scalar processing oriented machine scalar operations must be performed for the vector processing as many as the number of vector components. So called a vector processing mechanism by the von Neumann operational principle. Accessing vector data hasto beperformed by theevery pointing ofthe instruction or by the address calculation of the ALU, because there is only a program counter(PC) for the sequential counting of the instructions as a memory accessing device. It should be here proposed that an access unit dimensionally to address components has to be designed for the compensation of the organizational hardware defect of the conventional concept. The necessity for the vector structuring has to be implemented in the instruction set and be performed in the mid of the accessing data memory overlapped externally to the data processing unit at the same time.

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Design of an Effective Bump Mapping Hardware Architecture Using Angular Operation (각 연산을 이용한 효과적인 범프 매핑 하드웨어 구조 설계)

  • 이승기;박우찬;김상덕;한탁돈
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.11
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    • pp.663-674
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    • 2003
  • Bump mapping is a technique that represents the detailed parts of the object surface, such as a perturberance of the skin of a peanut, using the geometry mapping without complex modeling. However, the hardware implementation for bump mapping is considerable, because a large amount of per pixel computation, including the normal vector shading, is required. In this paper, we propose a new bump mapping algorithm using the polar coordinate system and its hardware architecture. Compared with other existing architectures, our approach performs bump mapping effectively by using a new vector rotation method for transformation into the reference space and minimizing illumination calculation. Consequently, our proposed architecture reduces a large amount of computation and hardware requirements.

An Implementation of Digital Neural Network Using Systolic Array Processor (영어 수계를 이용한 디지털 신경망회로의 실현)

  • 윤현식;조원경
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.30B no.2
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    • pp.44-50
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    • 1993
  • In this paper, we will present an array processor for implementation of digital neural networks. Back-propagation model can be formulated as a consecutive matrix-vector multiplication problem with some prespecified thresholding operation. This operation procedure is suited for the design of an array processor, because it can be recursively and repeatedly executed. Systolic array circuit architecture with Residue Number System is suggested to realize the efficient arithmetic circuit for matrix-vector multiplication and compute sigmoid function. The proposed design method would expect to adopt for the application field of neural networks, because it can be realized to currently developed VLSI technology.

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New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

  • Truong, Son Ngoc;Min, Kyeong-Sik
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.3
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    • pp.356-363
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    • 2014
  • In this paper, we propose a new memristor-based crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices. This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively. The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition. For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays. Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture. From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption.

Personalized Recommendation System using Level of Cosine Similarity of Emotion Word from Social Network (소셜 네트워크에서 감정단어의 단계별 코사인 유사도 기법을 이용한 추천시스템)

  • Kwon, Eungju;Kim, Jongwoo;Heo, Nojeong;Kang, Sanggil
    • Journal of Information Technology and Architecture
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    • v.9 no.3
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    • pp.333-344
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    • 2012
  • This paper proposes a system which recommends movies using information from social network services containing personal interest and taste. Method for establishing data is as follows. The system gathers movies' information from web sites and user's information from social network services such as Facebook and twitter. The data from social network services is categorized into six steps of emotion level for more accurate processing following users' emotional states. Gathered data will be established into vector space model which is ideal for analyzing and deducing the information with the system which is suggested in this paper. The existing similarity measurement method for movie recommendation is presentation of vector information about emotion level and similarity measuring method on the coordinates using Cosine measure. The deducing method suggested in this paper is two-phase arithmetic operation as follows. First, using general cosine measurement, the system establishes movies list. Second, using similarity measurement, system decides recommendable movie list by vector operation from the coordinates. After Comparative Experimental Study on the previous recommendation systems and new one, it turned out the new system from this study is more helpful than existing systems.

A Study on Metamorphic analysis and the expressive system in Contempory Architecture (현대 건축의 메타모포시스적 해석과 표현에 관한 연구)

  • Byun, Dae-Joong
    • Korean Institute of Interior Design Journal
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    • v.20 no.1
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    • pp.14-23
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    • 2011
  • The purpose of this study is to analyse the inclinations and expressions in contemporary architecture. Specially, we call this tendency and architectural movements as architectural metamorphosis. Metamorphosis in architecture present the core of the change of Forms and spirits in a change of outward shape and terrestrial identity. As in Ovid's extended dramatic poem of change and transformation, Metamorphoses, all Souls are deathless, and migrates from one form to another. Like these stories in Metamorphoses, Ovid tells the soul never dies, but leaps one form to anther, and can take any shape. So the architectural form, transformation and deformation in contemporary architecture means architectural sensations and cognitions can even approach the soul of form and shape under the transformation. The expressions and design strategies of metamorphosis in comtemporary architecture reveal continuous and sequential formations of space, linear structure with force and vector, rhythmical wavement and folding surface, lively wiggly flows of volumns and objects, and so on. Such qualities came from the periodical needs; separation of structure and surface, poly-surfacial movement, poly-sensual expression and experience, dematerialization and the dematerialized space, formless of non-formal architecture, digital architecture. Architecture of Metamorphosis is the ways and the needs of our period to overcome the static limits prohibits the liberal thoughts, to find the ways toward the opportunities and diversities and to unlock the imaginaire of the contemporary architecture.

Assessment of computational performance for a vector parallel implementation: 3D probabilistic model discrete cracking in concrete

  • Paz, Carmen N.M.;Alves, Jose L.D.;Ebecken, Nelson F.F.
    • Computers and Concrete
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    • v.2 no.5
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    • pp.345-366
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    • 2005
  • This work presents an assessment of the computational performance of a vector-parallel implementation of probabilistic model for concrete cracking in 3D. This paper shows the continuing efforts towards code optimization as reported in earlier works Paz, et al. (2002a,b and 2003). The probabilistic crack approach is based on the direct Monte Carlo method. Cracking is accounted by means of 3D interface elements. This approach considers that all nonlinearities are restricted to interface elements modeling cracks. The heterogeneity governs the overall cracking behavior and related size effects on concrete fracture. Computational kernels in the implementation are the inexact Newton iterative driver to solve the non-linear problem and a preconditioned conjugate gradient (PCG) driver to solve linearized equations, using an element by element (EBE) strategy to compute matrix-vector products. In particular the paper analyzes code behavior using OpenMP directives in parallel vector processors (PVP), such as the CRAY SV1 and CRAY T94. The impact of the memory architecture on code performance, and also some strategies devised to circumvent this issue are addressed by numerical experiment.

An Application of Microcomputer CAD Software to Suitability Analysis (적지분석을 위한 마이크로 컴퓨터 CAD용 소프트웨어의 활용기법에 관한 연구)

  • 김성균
    • Journal of the Korean Institute of Landscape Architecture
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    • v.20 no.3
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    • pp.1-10
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    • 1992
  • Land suitability method has become a standard part of planning analysis at many scales. GIS computer packages have been developed for this purpose. But those are still expensive and hard to learn, and also have limits to extend the results to a landscape design. For the relatively simple tasks and CAD-related works, an application of CAD software for the suitability analysis is very useful and easy to handle. For the purpose, this study develops a technique for suitability analysis, using vector based microcomputer CAD softwares.

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