• Title/Summary/Keyword: Variable-Reordering

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Study on Preconditioning of the clavier-Stokes Equations Using 3-Dimensional Unstructured Meshes (3차원 비정렬격자계를 이용한 Navier-Stokes해의 Preconditioning에 관한 연구)

  • Nam, Young-Sok;Choi, Hyoung-Gwon;Yoo, Jung-Yul
    • Transactions of the Korean Society of Mechanical Engineers B
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    • v.25 no.11
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    • pp.1581-1593
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    • 2001
  • An efficient variable-reordering method for finite element meshes is used and the effect of variable-reordering is investigated. For the element renumbering of unstructured meshes, Cuthill-McKee ordering is adopted. The newsy reordered global matrix has a much narrower bandwidth than the original one, making the ILU preconditioner perform bolter. The effect of variable reordering on the convergence behaviour of saddle point type matrix it studied, which results from P2/P1 element discretization of the Navier-Stokes equations. We also propose and test 'level(0) preconditioner'and 'level(2) ILU preconditioner', which are another versions of the existing 'level(1) ILU preconditioner', for the global matrix generated by P2/P1 finite element method of incompressible Navier-Stokes equations. We show that 'level(2) ILU preconditioner'performs much better than the others only with a little extra computations.

Improvement of Iterative Algorithm for Live Variable Analysis based on Computation Reordering (사용할 변수의 예측에 사용되는 반복적 알고리즘의 계산순서 재정렬을 통한 수행 속도 개선)

  • Yun Jeong-Han;Han Taisook
    • Journal of KIISE:Software and Applications
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    • v.32 no.8
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    • pp.795-807
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    • 2005
  • The classical approaches for computing Live Variable Analysis(LVA) use iterative algorithms across the entire programs based on the Data Flow Analysis framework. In case of Zephyr compiler, average execution time of LVA takes $7\%$ of the compilation time for the benchmark programs. The classical LVA algorithm has many aspects for improvement. The iterative algorithm for LVA scans useless basic blocks and calculates large sets of variables repeatedly. We propose the improvement of Iterative algorithm for LVA based on used variables' upward movement. Our algorithm produces the same result as the previous iterative algorithm. It is based on use-def chain. Reordering of applying the flow equation in DFA reduces the number of visiting basic blocks and redundant flow equation executions, which improves overall processing time. Experimental results say that our algorithm ran reduce $36.4\%\;of\;LVA\;execution\;time\;and\;2.6\%$ of overall computation time in Zephyr compiler with benchmark programs.

Search space pruning technique for optimization of decision diagrams (결정 다이어그램의 최적화를 위한 탐색공간 축소 기법)

  • Song, Moon-Bae;Dong, Gyun-Tak;Chang, Hoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.8
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    • pp.2113-2119
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    • 1998
  • The optimization problem of BDDs plays an improtant role in the area of logic synthesis and formal verification. Since the variable ordering has great impacts on the size and form of BDD, finding a good variable order is very important problem. In this paper, a new variable ordering scheme called incremental optimization algorithm is presented. The proposed algorithm reduces search space more than a half of that of the conventional sifting algorithm, and computing time has been greatly reduced withoug depreciating the performance. Moreover, the incremental optimization algorithm is very simple than other variable reordering algorithms including the sifting algorithm. The proposed algorithm has been implemented and the efficiency has been show using may benchmark circuits.

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An Optimization of Representation of Boolean Functions Using OPKFDD (OPKFDD를 이용한 불리안 함수 표현의 최적화)

  • Jung, Mi-Gyoung;Lee, Hyuck;Lee, Guee-Sang
    • The Transactions of the Korea Information Processing Society
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    • v.6 no.3
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    • pp.781-791
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    • 1999
  • DD(Decision Diagrams) is an efficient operational data structure for an optimal expression of boolean functions. In a graph-based synthesis using DD, the goal of optimization decreases representation space for boolean functions. This paper represents boolean functions using OPKFDD(Ordered Pseudo-Kronecker Functional Decision Diagrams) for a graph-based synthesis and is based on the number of nodes as the criterion of DD size. For a property of OPKFDD that is able to select one of different decomposition types for each node, OPKFDD is variable in its size by the decomposition types selection of each node and input variable order. This paper proposes a method for generating OPKFDD efficiently from the current BDD(Binary Decision Diagram) Data structure and an algorithm for minimizing one. In the multiple output functions, the relations of each function affect the number of nodes of OPKFDD. Therefore this paper proposes a method to decide the input variable order considering the above cases. Experimental results of comparing with the current representation methods and the reordering methods for deciding input variable order are shown.

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Approximate Decision Rules for Multi-Item Continuous Review Inventory Model (다품종(多品種) 연속점검(連續點檢) 재고관리(在庫管理)모델의 최적해법(最適解法))

  • Gang, Dong-Jin;Lee, Sang-Yong
    • Journal of Korean Society for Quality Management
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    • v.13 no.1
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    • pp.56-64
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    • 1985
  • This paper presents a general algorithm of multi-item continuous review models to obtain simultaneous solutions for ordering quantities and reorder points for each item in an inventory, while satisfying constraints on average inventory investment and reordering workload. Two models are formulated'in each model the heuristic method is utilized, and the partial back-logging is considered. In the first model, the objective function is the minimization of total inventory variable cost. In the second model, the objective function is the minimization of total time-weighted shortages, and the ordering, holding, and stockout costs in this model are independent each other. A numerical example is also solved to present application of each model.

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Embedded Software Minimization Using Don′t Cares (Don′t Care 정보를 이용한 임베디드 소프트웨어의 최적화)

  • Hong, Yu-Pyo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.3
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    • pp.48-54
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    • 2000
  • This paper exploits the use of don't cares on software synthesis for embedded systems. Embedded systems have extremely tight real-time and code size constraints. We propose applying BDD minimization techniques in the presence of a don't care set to synthesize code for extended Finite State Machines from a BDD-based representation of the FSM transition function. The don't care set can be derived from local analysis as well as from external information. We show experimental results, discuss their implications, the interactions between BDD-based minimization and dynamic variable reordering, and propose directions for future research.

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