• Title/Summary/Keyword: Varactor Diode

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Design of 950~2150MHz tunable bandpass ilter by cascading low and high pass filters (저역 및 고역 통과필터 종속연결형 950~2150MHz 가변대역통과필터의 설계)

  • 신재준;구경헌
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.7
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    • pp.1385-1393
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    • 1997
  • In this paper, a systematic design method of brjoadband tunable bandpass filter is presented by using user defined varactor diode method. The tunable bandpass filter is constructed as the cascade connection of low pass filter and high pass filter. The designed filter shows the characteristeristics of 2.7.+-.0.2dB insertion loss and 37.1.+-.5.0dB insertion loss and 32.1.+-.2.2dB image rejection. The results of the research can be used fodr the broadband tunable filter of DBS tuner and communication instruments.

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Design and Implementation of Voltage-controlled Oscillator for 380 MHz TRS Handset (380 MHz대 TRS 단말기용 전압제어 발진기 설계 및 제작)

  • 홍성용
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.9 no.2
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    • pp.219-225
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    • 1998
  • A voltage controlled oscillator for the local oscillator in 380 MHz TRS handset is designed and fabricated. To improve the phase noise characteristics, the NEC's 2SC4226 transistor with NF=1.2 at 1 GHz and Toshiba's 1SV229 varactor diode with Q=70 are used. And an inductor of VCO is realized by microstrip line. At the bias condition of 5 V and 10 mA, the output power and phase noise in the operating frequency range of 357∼387 MHz are above 3.7 dBm and 111 dBc/Hz at 12.5KHz offset from the carrier, respectively. And FM sensitivity deviation are within ±0.4 KHz. This VCO is well suited for TRS handset.

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Design of Group Delay Time Controller Based on a Reflective Parallel Resonator

  • Chaudhary, Girdhari;Choi, Heung-Jae;Jeong, Yong-Chae;Lim, Jong-Sik;Kim, Chul-Dong
    • ETRI Journal
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    • v.34 no.2
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    • pp.210-215
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    • 2012
  • In this paper, a group delay time controller (GDTC) is proposed based on a reflection topology employing a parallel resonator as the reflection termination. The design equations of the proposed GDTC have been derived and validated by simulation and experimental results. The group delay time can be varied by varying the capacitance and inductance at an operating frequency. To show the validity of the proposed circuit, an experiment was performed for a wideband code division multiple access downlink band operating at 2.11 GHz to 2.17 GHz. According to the experiment, a group delay time variation of $3{\pm}0.17$ ns over bandwidth of 60 MHz with excellent flatness is obtained.

A Study for DPDT Switch Design with Defected Ground Structure (DGS 구조를 이용한 DPDT 스위치 설계에 관한 연구)

  • An Ka-Ram;Jeoung Myeung-Sub;Lim Jae-Bong;Cho Hong-Goo;Park Jun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.3
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    • pp.132-138
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    • 2005
  • In this paper a DPDT(Double-Pole Double Through) switch with defected ground structure(DGS) is proposed. The equivalent circuit for the proposed switch structure is derived according to based on equivalent circuit of proposed DGS unit structure. The equivalent circuit parameters of DGS unit are extracted by using the circuit analysis method. The on/off operation of the proposed switch is obtained by varying the capacitance of the varactor diode at the defected ground plane. In the case of ON state, the insertion loss of the fabricated DPDT was shown under 1dB. And in OFF state, we found the rejection characteristic over 20dB at the designed frequency 2.45GHz. The experimental results show excellent insertion loss at on state and isolation at off state.

A Tuable Dual-Band Bandpass Filter Design Using Variable Characteristic Transmission Lines (가변 특성 임피던스 전송 선로를 이용한 가변 이중 대역 대역 통과 여파기)

  • Chaudhary, Girdhari;Jeong, Yong-Chae;Lim, Jong-Sik;Kim, Dong-Su;Kim, Jun-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.9
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    • pp.852-857
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    • 2011
  • In this paper, the application of a variable characteristic impedance transmission line that can be used to design a dual-band bandpass filter(BPF) is presented. The proposed filter offers a fixed first frequency passband and a controllable second passband. The tuning of the second passband is achieved by varying the characteristic impedance of and open shunt stub line in a stub loaded resonator(SLR) with the help of a defected ground structure(DGS) transmission line and varactor diodes. In order to validate the proposed structure, a two stage dual-band BPF with three transmission zeros was implemeted and experimentally verified based on its theoretical predictions and simulations.

Voltage Controlled Injection-Locked Oscillator Design at 2.4 GHz Band for Wideband Applications (광대역 응용을 위한 2.4 GHz 대역 전압 제어 주입 동기 발진기 설계)

  • Yoon, Won-Sang;Lee, Hun-Sung;Lee, Hee-Jong;Pyo, Seong-Min;Kim, Young-Sik;Han, Sang-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.3
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    • pp.292-298
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    • 2011
  • In this paper, a voltage controlled injection-locked oscillator(VC-ILO) is proposed for wideband applications. From the control of the free-running frequency by a varactor diode, the wide frequency locking range can be obtained for low-level injected signals. The proposed VC-ILO is implemented on an FR-4 substrate with a thickness of 0.8 mm. The free-running frequencies of the oscillator is 2.39~2.52 GHz at the control voltage of 0~5 V. While the frequency locking range of over 50 MHz is presented for -10 dBm injected signal level at a fixed frequency, the locking range of over 90 MHz can be achieved for -30 dBm by controlling the free-running frequency.

13.56 MHz Wireless Power Transfer System Using Loop Antennas with Tunable Impedance Matching Circuit (가변 임피던스 정합 회로를 갖는 루프 안테나를 이용한 13.56 MHz 무선 전력 전송 시스템)

  • Won, Do-Hyun;Kim, Hee-Seung;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.5
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    • pp.519-527
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    • 2010
  • In this paper, we proposed a 13.56 MHz wireless power transfer system using loop antennas with tunable impedance matching circuits. In general, a wireless power transfer system shows an impedance mismatching due to a reflected impedance, because a coupling coefficient is varied with respect to separation distance between two resonating antennas. The proposed system can compensate the effect of this impedance mismatch owing to tunable impedance matching circuits using varactor diodes. Therefore, transmission efficiency is enhanced, moreover, the center frequency of the system is not changed, regardless of separation distance between two antennas. In order to demonstrate the performance of the proposed system, a wireless power transfer system with tunable impedance matching circuits is designed and implemented, which has a pair of loop antennas with a dimension of $30\;cm{\times}30\;cm$ cm. The input return loss, coupling coefficient, efficiency, and input impedance variation with respect to a distance between loop antennas were measured. From measured results, the proposed system shows enhanced performances than the case of the general fixed $50\;{\Omega}$ impedance matching circuits. Therefore, we verified that the proposed wireless power transfer system using the proposed impedance matching scheme will be able to ensure robust operation even when the separation distance of antennas is varied.

New Configuration of a PLDRO with an Interconnected Dual PLL Structure for K-Band Application

  • Jeon, Yuseok;Bang, Sungil
    • Journal of electromagnetic engineering and science
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    • v.17 no.3
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    • pp.138-146
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    • 2017
  • A phase-locked dielectric resonator oscillator (PLDRO) is an essential component of millimeter-wave communication, in which phase noise is critical for satisfactory performance. The general structure of a PLDRO typically includes a dual loop of digital phase-locked loop (PLL) and analog PLL. A dual-loop PLDRO structure is generally used. The digital PLL generates an internal voltage controlled crystal oscillator (VCXO) frequency locked to an external reference frequency, and the analog PLL loop generates a DRO frequency locked to an internal VCXO frequency. A dual loop is used to ease the phase-locked frequency by using an internal VCXO. However, some of the output frequencies in each PLL structure worsen the phase noise because of the N divider ratio increase in the digital phase-locked loop integrated circuit. This study examines the design aspects of an interconnected PLL structure. In the proposed structure, the voltage tuning; which uses a varactor diode for the phase tracking of VCXO to match with the external reference) port of the VCXO in the digital PLL is controlled by one output port of the frequency divider in the analog PLL. We compare the proposed scheme with a typical PLDRO in terms of phase noise to show that the proposed structure has no performance degradation.

A Frequency Adjustable Double Lorentz CRLH Transmission Line using DGS (DGS를 이용한 주파수 가변 DL-CRLH 전송선로)

  • Lim, Jong-Sik;Lee, Jae-Hoon;Lee, Jun;Jeong, Yong-Chae;Han, Sang-Min;Ahn, Dal
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.59 no.8
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    • pp.1429-1435
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    • 2010
  • In this paper, a double lorentz composite right left handed(DL-CRLH) transmission line is designed using defected ground structure (DGS) and varactor diodes. Previously, the diode has been adopted only selectively for one of parallel or series resonators, and the balanced frequency as well as triple band frequencies were fixed. However in the proposed DL-CRLH transmission line, the balanced frequency, where the resonant frequencies of the series-connected parallel resonator and shunt-connected series resonator are the same, is adjustable. In addition, the triple band frequencies are controlled, too. The measured balanced frequency varies between 3.42~4.8GHz according to the controlled bias voltage. Under the same bias condition for the balanced frequency, the adjusted frequencies are 2.22~2.77GHz, 3.7~5.2GHz, 7.32~8.23GHz, 3.42~4.8GHz, and 4.44~5.92GHz for the conditions that ${\beta}d=+0.5{\pi}$, $-0.5{\pi}$, 2nd $+0.5{\pi}$, ${\omega}_{\infty}$, and ${\omega}_o$, respectively.

A Study on the Design of VCO Using Junction Capacitance of Active Element (능동소자의 접합 커패시턴스를 이용한 VCO 설계에 관한 연구)

  • Kang, Suk-Youb;Park, Wook-Ki;Go, Min-Ho;Park, Hyo-Dal
    • Journal of Advanced Navigation Technology
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    • v.8 no.1
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    • pp.57-65
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    • 2004
  • In this paper, keeping pace with light weight, pocket-size, lower-price, we design VCO(Voltage Controlled Oscillator) X/Ku band for using at public RD(Radar Detector) to apply to controlled voltage on base in transistor which used as a oscillator, without using varactor diode in part of VCO tuner. As a result of simulation, we conclude VCO could be have 110 MHz by controlled voltage 4.25 V to 4.80 V and show its output 9.63 dBm at operating frequency, 11.46 GHz, and its phase noise -107.2 dBc at 1 MHz offset frequency. So it turned out suitable performance for commercial use.

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