• Title/Summary/Keyword: Vacuum Annealing

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Laboratory on network (네트워크 상에서의 물리실험)

  • Nam Yuri;Kim J. -S.
    • Journal of the Korean Vacuum Society
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    • v.13 no.4
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    • pp.164-174
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    • 2004
  • Computer control of experiments is very powerful because computer can outperform human being for most routine and repeated procedures. We successfully made the whole process of sputtering and annealing fully automated and controllable through network. The present work shows a possibility of building unmanned laboratory.

ELA Poly-Si과 SLS Poly-Si에서 Boron Activation에 관한 연구

  • Hong, Won-Ui;No, Jae-Sang
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.376-376
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    • 2012
  • 본 연구는 Poly-Si에 이온 주입된 Boron의 Activation 거동을 연구하고자 SLS (Sequential Lateral Solidification) Poly-Si과 ELA (Excimer Laser Annealing) Poly-Si의 활성화 거동을 비교 분석하였다. SLS 및 ELA 결정화 방법으로 제조된 Poly-Si을 모재로 비 질량 분리 방식의 ISD (Ion Shower Doping) System을 사용하여 2.5~7.0 kV까지 이온주입 하였다. 이온주입 후 두 가지의 열처리 방법, 즉, FA 열처리(Furnace Annealing)와 RTA 열처리(Rapid Thermal Annealing)를 사용하여 도펀트 활성화 열처리를 수행하고 이온주입 조건 및 활성화 열처리 방법에 따른 결함 회복 및 도펀트 활성화 거동의 변화를 관찰하였다. TRIM-code Simulation 결과 가속 이온 에너지와 조사량이 증가 할수록 이온주입 시 발생하는 결함의 양이 증가하는 것을 정량적으로 계산하였다. 실험 결과 결함의 양이 증가 할수록 Activation이 잘되는 것을 관찰할 수 있었다. SLS Poly-Si에 비하여 ELA Poly-Si의 경우 도펀트 활성화 열처리 후 활성화 효율이 높게 나타났다. 본 결과는 Grain Boundary의 역할과 밀접한 관계가 있으며 간단한 정성적인 Model을 제시하였다. 활성화 효율의 경우 RTA 열처리 시편이 FA 시편에 비하여 높은 것이 관찰되었다. 본 결과는 열처리 온도 및 시간에 따라 변화하는 Boron의 특이한 활성화 거동인 Reverse Annealing 효과에 기인하는 것으로 규명되었다.

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A study fo Al/W(110) surface structure at various annealing temperature and coverage

  • Choe, Dae-Seon;Park, Min-Geol;Park, Mi-Mi;Lee, Jeong-Hwan;Kim, Ju-Hwan;Kim, Do-Hyeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.344-344
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    • 2011
  • W(110)면에 흡착원자인 Al원자의 coverage와 annealing과정에서의 온도를 변화시켜, 여러 조건에서의 Al/W(110)계의 흡착구조를 저에너지 전자회절(LEED)과 이온산란분광법(ISS-TOF)을 이용하여 연구하였다. 여러 결과 중, annealing 온도가 900K인 1.0ML Al/W(110)면은 double domain의 p($1{\times}1$)의 흡착구조로 W(110)면의 center of hollow site에서 $0.55{\AA}$ 벗어난 위치에 흡착되었으며, W(110) 표면원자로부터 Al 원자까지의 높이는 $2.13{\pm}0.15{\AA}$이다. 또한 annealing 온도가 1100K인 0.5ML Al/W(110)면은 double domain의 p($2{\times}1$)의 흡착구조로 W(110)면의 center of bridge site에 흡착되었으며, W(110) 표면원자로부터 Al 원자까지의 높이는 $2.18{\pm}0.15{\AA}$이다.

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Realization of flexible polymer solar cell by annealing-free process using 1,8-Diiodooctane as additive

  • Kim, Youn-Su;Ju, Byeong-Kwon;Kim, Kyung-Kon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.383-383
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    • 2011
  • We fabricated thermal annealing-free polymer solar cells (PSC) by processing with additive and applied to flexible substrates. The 1, 8-Diiodooctane of 3 vol% blended with active solution resulted in enhancement of $J_{SC}$ due to increase of light absorption and hole mobility as improving the crystallinity of P3HT. In addition, the $V_{OC}$ of PSCs with additive was improved by inserting $TiO_2$ layer without any treatment. The $TiO_2$ layer prevented the direct contact between active layer and Al electrode and reduced the charge recombination near Active/Al interface. It was confirmed by calculation of J0 and photo-voltage transient measurement. The power conversion efficiencies of annealing-free PSCs using additive for ITO glass and flexible (ITO PEN) substrate were obtained 3.03% and 2.45%, respectively.

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LTPS 공정 Diode Laser Annealing 방식을 이용한 Poly-Si 결정화

  • Lee, Jun-Gi;Kim, Sang-Seop
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.08a
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    • pp.336-336
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    • 2011
  • AMOLED에 대한 관심이 높아짐에 따라 LTPS (Low Temperature Poly Silicon) TFT에 대한 연구가 활발히 이루어지고 있다. 다결정 실리콘은 단결정 실리콘에 비해 100 cm2/V 이상의 이동도를 보이는 우수한 특성으로 인해 AMOLED 디스플레이에 적합하며 여러 기업에서 LTPS 공정을 이용한 TFT제작을 연구 중이다. LTPS 공정은 현재 ELA (Excimer Laser Annealing) 방식으로 대면적 유리기판에 ELA 방법을 적용함에 있어 설비투자 비용이 지나치게 높아진다는 단점을 가지고 있다. 설비투자 비용의 문제점을 해결하기 위해 Diode Laser을 이용하여 Annealing하는 방법에 대해 연구하였다. 본 연구는 Diode Laser Annealing 방식을 이용하여 poly-Si을 구현하였다. 단결정 실리콘을 제작하기 위해 ICP-CVD장비를 이용하여 150$^{\circ}C$에서 SiH4, He2 혼합, He/SiH4의 flow rate는 20/2[sccm], RF power는 400 W에서 700 W으로 가변, 증착 압력은 25mTorr으로 하였다. 940 nm 파장의 30 W Diode Laser를 8 mm Spot Size로 a-Si에 순간 조사하여 결정화, 그 결과 grain을 형성한 polycrystalline 구조를 확인하였다.

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The evolution of microstructures and electrical properties of $Y_2O_3$ thin films on si(100) upon annealing treatments (열처리에 따른 $Y_2O_3$ 박막의 미세 구조 변화와 전기적 특성 변화에 대한 고찰)

  • 정윤하;강성관;김은하;고대홍;조만호;황정남
    • Journal of the Korean Vacuum Society
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    • v.8 no.3A
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    • pp.218-223
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    • 1999
  • We investigated the interfacial reactions between the $Y_2O_3$ film deposited by ICB processing and p-type (100) Si substrates upon annealing treatments in $O_2$ and Ar gas ambients. we also investigated the evolution of surface morphology of ICB deposited $Y_2O_3$ films upon annealing treatments. We observed that the root-mean-square(RMS) value of surface roughness measured by AFM increased with annealing time at $800^{\circ}C$ in $O_2$ ambient, while the change of surface roughness was not observed in Ar ambient. We also found the growth of $SiO_2$ layer and the formation of yttium silicate layer. From the capacitance values $(C_{acc})$ measured by C-V measurements, the relative didldctric constant of $Y_2O_3$ film in metal-insulator-semiconductor(MIS) structure was estimated to be about 9.

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Effect of rapid thermal annealing on CdS films prepared by RF magnetron sputtering

  • Hwang, Dong-Hyeon;Gam, Dae-Ung;An, Jeong-Hun;Son, Yeong-Guk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.164-164
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    • 2010
  • Cds films were deposited on glass substrates using rf magnetron sputtering method followed by rapid thermal annealing(RTA). Effects of annealing temperature on surface characteristic, structural, electrical and optical property of CdS films were investigated at different temperatures ranging from 250 to $550^{\circ}C$ with various holding time. The film annealed at $450^{\circ}C$ with less than 1 min holding time is attributed to the improved crystalline quality of CdS film due to the effective relaxation of residual compressive stress and achieving maximum grain size. The results show that RTA treatments under optimal annealing condition can provide significant improvements in the properties of CdS films.

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Radiation Damage Effects in $NB^+$ Implanted Sapphire After Annealing

  • Huang, N.K.;Naramoto, H.
    • Journal of the Korean Vacuum Society
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    • v.7 no.s1
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    • pp.78-84
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    • 1998
  • Niobium ions of 380 keV energy have been implanted at 300k in sapphire with a dose of $5\times10^{16}\textrm{ions/cm}^2$ and subsequently thermal annealed up to $1100^{\circ}C$ at reducing atmosphere. The behavior of the radiation damage produced by ion implantation followed by annealing is investigated using optical absorption technique and X-ray photoelectron spectroscopy(XPS). It is found that different defects annealed are dependent on the annealing temperature owing to different mechanisms which are proposed on the basis of the optical absorption measurement, and the implanted niobium in sapphire is in different local environments with different charge states after annealing, which are analyzed by XPS measurements.

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The Effect of Thermal Annealing Process on Fermi-level Pinning Phenomenon in Metal-Pentacene Junctions

  • Cho, Hang-Il;Park, Jin-Hong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.290.2-290.2
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    • 2016
  • Recently, organic thin-film transistors have been widely researched for organic light-emitting diode panels, memory devices, logic circuits for flexible display because of its virtue of mechanical flexibility, low fabrication cost, low process temperature, and large area production. In order to achieve high performance OTFTs, increase in accumulation carrier mobility is a critical factor. Post-fabrication thermal annealing process has been known as one of the methods to achieve this by improving the crystal quality of organic semiconductor materials In this paper, we researched the properties of pentacene films with X-Ray Diffraction (XRD) and Atomic Force Microscope (AFM) analyses as different annealing temperature in N2 ambient. Electrical characterization of the pentacene based thin film transistor was also conducted by transfer length method (TLM) with different annealing temperature in Al- and Ti-pentacene junctions to confirm the Fermi level pinning phenomenon. For Al- and Ti-pentacene junctions, is was found that as the surface quality of the pentacene films changed as annealing temperature increased, the hole-barrier height (h-BH) that were controlled by Fermi level pinning were effectively reduced.

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Annealing Characteristics of Pt-Co Alloy thin Films for RTD Temperature Sensors (RTD용 Pt-Co 합금박막의 열처리 특성)

  • Hong, Seog-Woo;Seo, Jeong-Hwan;No, Sang-Soo;Chung, Gwiy-Sang
    • Proceedings of the KIEE Conference
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    • 1998.07d
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    • pp.1349-1351
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    • 1998
  • Platinum-Cobalt alloy thin films were deposited on $Al_2O_3$ substrates by r.f. cosputtering for RTD temperature sensors. We made Pt-Co alloy resistance patterns on the $Al_2O_3$ substrates by lift-off method and investigated the physical and electrical characteristics of these films under various conditions (the input power, working vacuum, annealing temperature, thickness of thin films) and also after annealing these films. At input power of Pt : $4.4 W/cm^2$. Co:6.91W/$cm^2$. working vacuum of 10 mTorr and annealing conditions of $1000^{\circ}C$ and 60 min, the resistivity and sheet resistivity of Pt-Co thin films was $15{\mu}{\Omega}{\cdot}cm$ and $0.5{\Omega}/{\square}$, respectively. The TCR value of Pt-Co alloy thin films was measured with various thickness of thin films and annealing conditions. The optimum TCR value is gained under conditions $3000{\AA}$ of thin films thickness and $1000^{\circ}C$ of annealing temperature. These results indicate that Pt-Co alloy thin films have potentiality for the high resolution RTD temperature sensors.

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