• 한국컴퓨터정보학회논문지
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• 제26권8호
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• pp.1-11
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• 2021

본 논문에서는 HPC 시스템의 에너지 효율을 향상시키기 위해 Event-driven Uncore Frequency Scaler (eUFS)라는 새로운 전력관리 메커니즘을 제안한다. eUFS는 LAPI (LLC accesses Per Instructions) 및 CPI (Clock Cycles Per Instruction)와 같은 하드웨어 이벤트를 활용하여 언코어 주파수를 동적으로 조정한다. 기준 시간을 주기로 해당 하드웨어 이벤트를 취합하고, 취합한 이벤트와 이전 언코어 주파수를 이용해 목표 언코어 주파수를 결정한다. NPB 벤치마크를 사용한 실험을 통해 본 논문에서 제안하는 UFS 메커니즘은 C/D class NPB 벤치마크에 대해 평균 6%의 에너지 소비를 감소시키는 것으로 확인되었고 실행시간 증가는 평균 2% 수준인 것으로 확인되었다.

• ETRI Journal
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• 제40권6호
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• pp.759-773
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• 2018

Uncore components such as on-chip memory systems and on-chip interconnects consume a large amount of energy in emerging embedded applications. Few studies have focused on next-generation analytical models for future chip-multiprocessors (CMPs) that simultaneously consider the impacts of the power consumption of core and uncore components. In this paper, we propose a convex-optimization approach to design heterogeneous uncore architectures for embedded CMPs. Our convex approach optimizes the number and placement of memory banks with different technologies on the memory layer. In parallel with hybrid memory architecting, optimizing the number and placement of through silicon vias as a viable solution in building three-dimensional (3D) CMPs is another important target of the proposed approach. Experimental results show that the proposed method outperforms 3D CMP designs with hybrid and traditional memory architectures in terms of both energy delay products (EDPs) and performance parameters. The proposed method improves the EDPs by an average of about 43% compared with SRAM design. In addition, it improves the throughput by about 7% compared with dynamic RAM (DRAM) design.