• Title/Summary/Keyword: Triple Modular Redundancy

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Search Technique for the Design of Cost Effective Fault Tolerant Systems (효율적인 결함허용 시스템 설계를 위한 탐색기법)

  • 이효순;신현식
    • Proceedings of the Korean Information Science Society Conference
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    • 2000.04a
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    • pp.6-8
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    • 2000
  • 결함허용 시스템은 다양한 형태의 중복을 사용하여 신뢰도를 향상시킬 수 있는 반면, 시스템의 비용을 크게 증가시킨다. 본 논문은 만족스러운 신뢰도를 갖추면서 추가 비용을 적게 요구하는 결함허용 컴퓨터 시스템의 구조를 결정하기 위한 설계 문제를 정의하고 탐색에 기반을 둔 해결법을 제안한다. 이 때, 탐색 기법이 방문하는 탐색 공간의 크기를 줄이기 위하여 사용되는 세 가지의 유용한 사실을 설명한다. 이를 바탕으로 삼중 모듈 중복(TMR: Triple-Modular-Redundancy), 백업 예비(backup sparing), 그리고 혼합 중복(hybride redundancy) 기법과 같은 결함허용 기법들이 시스템 구조에 적용되었을 때, 탐색 공간을 줄이는 용도로 사용될 수 있는 신뢰도 제약조건을 유도해낸다.

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A Study On The Reliability Characteristics of Fail-Safe Control Logic (고장-안전 제어논리의 신뢰성 특성에 관한 연구)

  • 한상섭;이정석;김민수;이기서
    • Proceedings of the Korean Reliability Society Conference
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    • 2000.04a
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    • pp.247-253
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    • 2000
  • 본 논문은 정보 여분(Information Redundancy)에서의 에러 검출 코딩(Error Detect Coding) 기법을 이용하여 3-out-of-6 자체 검사기를 설계하고, 주기적인 코드(Frequency Coding) 주입을 통해 고장-안전 제어 논리를 모델링 했다. 고장-안전 제어 논리 모듈과 TMR(Triple Modular Redundancy)의 단일 모듈간에 대해서 신뢰성 병렬 수치 해석을 수행하였고, 이때 고장-안전 제어 논리가 기존의 하드웨어 여분 기법보다 시스템 소모비용과 기능적 오버헤드가 감소되어 기능신뢰성이 증가되는 결과를 얻었다.

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분산환경의 결험허용 응용소프트웨어 개발을 위한 명세방법

  • 김정술;강병욱
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1998.03a
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    • pp.229-233
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    • 1998
  • 이 논문에서 우리는 분산환경의 결함허용 응용소프트웨어 개발을 위한 명세방법을 제안한다. 즉, 시스템의 오류시에도 복구 가능한 논리전달을 위한 명세언어를 제공하는데 분산환경에 적합한 package개념과 객체에 기반하여 시스템을 이끈다. 이 명세방법을 이용하면 triple modular redundancy 나 voted-process pairs 등이 쉽게 명세 가능하다. 특히 , 본 논문은 DARTS 설계방법의 모듈객체와의 접목을 통하여 자연스럽게 실시간 설계로 유도한다.

Development of the High Reliable Safety PLC for the Nuclear Power Plants (고신뢰도 안전등급 제어기기 개발)

  • Son, Kwang-Seop;Kim, Dong-Hoon;Son, Choul-Woong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.62 no.1
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    • pp.109-119
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    • 2013
  • This paper presents the design of the Safety Programmable Logic Controller (SPLC) used in the Nuclear Power Plants, an analysis of a reliability for the SPLC using a markov model. The architecture of the SPLC is designed to have the multiple modular redundancy composed of the Dual Modular Redundancy(DMR) and the Triple Modular Redundancy(TMR). The operating system of the SPLC is designed to have the non-preemptive state based scheduler and the supervisory task managing the sequential scheduling, timing of tasks, diagnostic and security. The data communication of the SPLC is designed to have the deterministic state based protocol, and is designed to satisfy the effective transmission capacity of 20Mbps. Using Markov model, the reliability of SPLC is analyzed, and assessed. To have the reasonable reliability such as the mean time to failure (MTTF) more than 10,000 hours, the failure rate of each SPLC module should be less than $2{\times}10^{-5}$/hour. When the fault coverage factor (FCF) is increased by 0.1, the MTTF is improved by about 4 months, thus to enhance the MTTF effectively, it is needed that the diagnostic ability of each SPLC module should be strengthened. Also as the result of comparison the SPLC and the existing safety grade PLCs, the reliability and MTTF of SPLC is up to 1.6-times and up to 22,000 hours better than the existing PLCs.

Analysis of the Single Event Effect of the Science Technology Satellite-3 On-Board Computer under Proton Irradiation (과학기술위성 3호 온보드 컴퓨터의 양성자 빔에 의한 Single Event Effect 분석)

  • Kang, Dong-Soo;Oh, Dae-Soo;Ko, Dae-Ho;Baik, Jong-Chul;Kim, Hyung-Shin;Jhang, Kyoung-Son
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.39 no.12
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    • pp.1174-1180
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    • 2011
  • Field Programmable Gate Array(FPGA)s are replacing traditional integrated circuits for space applications due to their lower development cost as well as reconfigurability. However, they are very sensitive to single event upset (SEU) caused by space radiation environment. In order to mitigate the SEU, on-board computer of STSAT-3 employed a triple modular redundancy(TMR) and scrubbing scheme. Experimental results showed that upset threshold energy was improved from 10.6 MeV to 20.3 MeV when the TMR and the scrubbing were applied to the on-board computer. Combining the experimental results with the orbit simulation results, calculated bit-flip rate of on-board computer is 1.23 bit-flips/day assuming in the worst case of STSAT-3 orbit.

A Modeling Technique for Performance Evaluation of Asynchronous TMR Controller (비동기 3중화 제어기의 성능분석을 위한 모델링 기법)

  • Kim, Seog-Joo;Kwon, Soon-Man;Kim, Jong-Moon;Kim, Kook-Hun
    • Proceedings of the KIEE Conference
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    • 2000.07d
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    • pp.2684-2686
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    • 2000
  • This paper describes a preliminary study on a modeling technique for control performance evaluation of asynchronous TMR(Triple Modular Redundancy) controller. Hybrid system modeling is applied to TMR controller performance evaluation and mixed logical dynamical system description is used to model the behavior of majority voter in the controller. Windup and bumpless transfer problems in redundancy controls are also mentioned.

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Design of Delayed Triple-Core Lock-Step Processor with Memory Rollback for Automotive Applications (메모리 롤백 기능을 가진 차량 어플리케이션용 삼중 코어 지연 락스텝 프로세서 설계)

  • Seonghyun, Yang;Ji-Woong, Choi;Seongsoo, Lee
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.628-632
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    • 2022
  • In this paper, a triple-core delayed lock-step processor is proposed for automotive applications. It performs same operations in three different cores independently, and votes their results to get final values. Therefore its operations are safe even if errors occur in one core. Its three cores operate in a delayed manner to prevent simultaneous errors in multiple cores due to radiative ray or electromagnetic wave. When an error occurs in main core connected to the memory, wrong values can be stored in the memory, so the proposed processor performs memory rollback to restore correct values. Simulation results show that the proposed processor successfully compensates various errors.

Modeling and Control Method for High-power Electromagnetic Transmitter Power Supplies

  • Yu, Fei;Zhang, Yi-Ming
    • Journal of Power Electronics
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    • v.13 no.4
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    • pp.679-691
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    • 2013
  • High-power electromagnetic transmitter power supplies are an important part of deep geophysical exploration equipment. This is especially true in complex environments, where the ability to produce a highly accurate and stable output and safety through redundancy have become the key issues in the design of high-power electromagnetic transmitter power supplies. To solve these issues, a high-frequency switching power cascade based emission power supply is designed. By combining the circuit averaged model and the equivalent controlled source method, a modular mathematical model is established with the on-state loss and transformer induction loss being taken into account. A triple-loop control including an inner current loop, an outer voltage loop and a load current forward feedback, and a digitalized voltage/current sharing control method are proposed for the realization of the rapid, stable and highly accurate output of the system. By using a new algorithm referred to as GAPSO, which integrates a genetic algorithm and a particle swarm algorithm, the parameters of the controller are tuned. A multi-module cascade helps to achieve system redundancy. A simulation analysis of the open-loop system proves the accuracy of the established system and provides a better reflection of the characteristics of the power supply. A parameter tuning simulation proves the effectiveness of the GAPSO algorithm. A closed-loop simulation of the system and field geological exploration experiments demonstrate the effectiveness of the control method. This ensures both the system's excellent stability and the output's accuracy. It also ensures the accuracy of the established mathematical model as well as its ability to meet the requirements of practical field deep exploration.

Implementation of Improved safety and reliability Embedded system using Backup and Restore of TMR Architecture (TMR 구조에서의 백업과 복원을 활용한 안정성 및 신뢰성 향상 임베디드 시스템 구현)

  • Park, Joo-Yul;Lee, Jun-Hwan;Kim, Hyo-Sang;Kim, Bong-Taek;Chung, Ki-Seok
    • Proceedings of the KSR Conference
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    • 2011.10a
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    • pp.188-194
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    • 2011
  • The purpose of this paper is to explain the implementation method in order to enhance stability and reliability of embedded system. In this research, Texas Instrument (TI)'s TMS570 MCU(Micro Controller Unit) is used to satisfy the standard of stability that is IEC 61508. IEC 61508 suggest SIL(Safety Integrity Level) from 1 to 4 and TMS570 is satisfied SIL3. Also, TMS570 can provide several stability functions can be used in realtime system. To use such functions, this paper suggest the solution about the defect that can be used in realtime system. In basic way TMR(Triple Modular Redundancy) suggested in addition to explain about the way to improve safety and reliability. Also this paper will suggest the method that reinforce the stability of calculation by using multiplex voter and memory.

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A Study for Checkpointing Schemes based on a TMR System (TMR 시스템 기반의 Checkpointing 기법에 관한 연구)

  • Kim, Tae-Wook;Kang, Myung-Seok;Kim, Hag-Bae
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.11a
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    • pp.397-400
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    • 2003
  • TMR(Triple Modular redundancy)은 공간여분(W/H 및 S/W)을 정적으로 활용하는 가장 간단한 구조를 지닌 대표적인 고장포용 기법중의 하나이다. TMR 구조 고장시 TMR 시스템 고장복구를 위해 잘못된 결과를 가지고 있는 프로그램의 일부분을 재실행 또는 프로그래밍 전체를 재시작하는 기법을 적용하는 것은 일반적으로 상당한 시간을 필요로 한다. 이러한 단점을 극복하기 위해 본 논문에서는 TMR 고장을 효과적으로 복구하기 위해 또 다른 형태의 시간여분 기법인 rollback과 rol1-forward 기법에 checkpoint들을 적용하여 처리하는 시간 및 공간여분을 혼용하는 기법을 제안하였다.

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