• 반도체디스플레이기술학회지
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• 제22권4호
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• pp.136-141
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• 2023

The continuous shrinking of transistors in integrated circuits leads to difficulties in improving performance, resulting in the emerging transistors such as nanosheet field-effect transistors. In this paper, we propose a TCAD-machine learning framework of nanosheet FETs to model the current-voltage characteristics. Sentaurus TCAD simulations of nanosheet FETs are performed to obtain a large amount of device data. A machine learning model of I-V characteristics is trained using the multi-layer perceptron from these TCAD data. The weights and biases obtained from multi-layer perceptron are implemented in a PSPICE netlist to verify the accuracy of I-V and the DC transfer characteristics of a CMOS inverter. It is found that the proposed machine learning model is applicable to the prediction of nanosheet field-effect transistors device and circuit performance.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.304.1-304.1
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• 2014

Flat-panel displays have been growing as an essential everyday product in the current information/communication ages in the unprecedented speed. The forward-coming applications require light-weightness, higher speed, higher resolution, and lower power consumption, along with the relevant cost. Such specifications demand for a new concept-based materials and applications, unlike Si-based technologies, such as amorphous Si and polycrystalline Si thin film transistors. Since the introduction of the first concept on the oxide-based thin film transistors by Hosono et al., amorphous oxide thin film transistors have been gaining academic/industrial interest, owing to the facile synthesis and reproducible processing despite of a couple of shortcomings. The current work places its main emphasis on the binary oxides composed of ZnO and SnO2. RF sputtering was applied to the fabrication of amorphous oxide thin film devices, in the form of bottom-gated structures involving highly-doped Si wafers as gate materials and thermal oxide (SiO2) as gate dielectrics. The physical/chemical features were characterized using atomic force microscopy for surface morphology, spectroscopic ellipsometry for optical parameters, X-ray diffraction for crystallinity, and X-ray photoelectron spectroscopy for identification of chemical states. The combined characterizations on Zn-Sn-O thin films are discussed in comparison with the device performance based on thin film transistors involving Zn-Sn-O thin films as channel materials, with the aim to optimizing high-performance thin film transistors.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2005년도 창립60주년 기념 추계 학술대회
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• pp.240.1-240.1
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• 2005

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.1279-1282
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• 2008

Organic field effect transistors are excellent candidates for addressing and local amplification elements for large area electronics because they can easily be processed at low temperatures on essentially arbitrary substrates. We present the use of these devices in an active matrix photodetector and as a buffer for a strain sensor.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.94-97
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• 2008

We have fabricated wet-processed thin-film transistors of unsubstituted pentacene by two kinds of fabrications both solution and dispersion processes. Transistor performances with thin film structures including grain structures in the films by two pro cesses are studied.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.91-93
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• 2008

The organic field-effect transistors with step-edge structure were fabricated. Source and drain electrodes were obliquely deposited by vacuum evaporation. The step-edge of the gate electrode serve as a shadow mask, and the short channel is formed at the step-edge. The excellent device performances were obtained.

• 대한전자공학회논문지
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• 제13권5호
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• pp.1-8
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• 1976

게이트의 길이가 2mm인 GaAb 금속반도체전계치과트랜지스터를 HP8545 자동회로망분석기에 의하여 주파수 1∼2GHz 사이에서 산란계수를 측정하였고, 산란계수의 도움으로 완전한 등가회로를 구현하였다. 본 논문에서는 50Ω의 높은 입출력 Impedance로 정합시키기 위하여 Microstrip을 사용하여 GaAs MESFET증폭기를 개발하였으며 전력이득이 8dB, 정재파비가 1.5보다 적은 결과를 얻었다. Microwave GaAs Metal Semiconductor Field effect Transistors (MESFET) with the gate-length of two micrometers are investigated. The scattering parameters of the transistors have been measured from 1GHz to 2GHz by Hp8545 Automatic network analyzer. From the measured data, an equivalent circuit is established which consists of an ntrinsic and. extrinsic transistor elements. In this paper, GaAb MESFET Amplifier is used in conjunction with conventional microstrip techniques to match into a 50 ohms high input/output impedances system. We found that Power gain is less than 8dB and VSWR is less than 1.5 in L-Band.

• 한국전기전자재료학회논문지
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• 제30권9호
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• pp.566-571
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• 2017

A soft baking process was used to enhance the electrical characteristics of solution-processed indium-zincoxide (IZO) thin-film transistors (TFTs). We demonstrate a stable soft baking process using a hot plate in air to maintain the electrical stability and improve the electrical performance of IZO TFTs. These oxide transistors exhibited good electrical performance; a field-effect mobility of $7.9cm^2/Vs$, threshold voltage of 1.4 V, sub-threshold slope of 0.5 V/dec, and a current on/off ratio of $2.9{\times}10^7$ were measured. To investigate the static response of our solutionprocessed IZO TFTs, simple resistor load type inverters were fabricated by connecting a resistor (5 or $10M{\Omega}$). Our IZO TFTs, which were manufactured using the soft baking process at a baking temperature of $120^{\circ}C$, performed well at the operating voltage, and are therefore a good candidate for use in advanced logic circuits and transparent display backplanes.

• 전자공학회논문지A
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• 제33A권10호
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• pp.107-114
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• 1996

Monte carlo method is especially a useful method for the analysis of thermal noise of semiconductor devices since the time dependence of microscopic details is simulated directly. Recently, a mthod for the calculation of the instantaneous currents of 2-dimensional devices, which is numerically more accurate than the conventional method, has been proposed using the generalized ramo-shockley theorem. Using this mehtod we investage the validity of the existing thermal noise theories of field-effect transistors. First, the 1-dimensional analysis of thermal noise theories of field-effect transistors. First, the 1-dimensional analysis of thermal noise theories of field-effect transistors. First, the 1-dimensional analysis of thermal noise using ramo-shockley theorem is shown to be applicable to 2 dimensional devices if the frequency of interest is low enough. The correlation between electrons in different regions of th echannel is shown not to be negligible. And we also obtian the spatial map of the noise in the channel region. By doing so, we show that the steady state nyquist theorem is the correct theory rather than the theory by van der ziel et.al.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권1호
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• pp.41-44
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• 2004

The trend of decreasing the minimal structure sizes in microelectronics is still being continued. Therefore in its roadmap the Semiconductor Industries Association predicts a printed minimum MOS-transistor channel length of 10 nm for the year 2018. Although the resolution of optical lithography still dramatically increases, there are known and proved solutions for structure sizes significantly below 50 nm up to now. In this work a new method for the fabrication of extremely small MOS-transistors with a channel length and width below 50 nm with low demands to the used lithography will be explained. It's a further development of our deposition and etchback technique which was used in earlier research to produce transistors with very small channel lengths down to 30 nm, with a scaling of the transistor's width. The used technique is proved in a first charge of MOS-transistors with a channel area of W=200 nm and L=80 nm. The full CMOS compatible technique is easily transferable to almost any other technology line and results in an excellent homogeneity and reproducibility of the generated structure size. The electrical characteristics of such small transistor will be analyzed and the ultimate limits of the technique will be discussed.