• Title/Summary/Keyword: Total harmonic distortion

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A Three-Phase High Frequency Semi-Controlled Battery Charging Power Converter for Plug-In Hybrid Electric Vehicles

  • Amin, Mahmoud M.;Mohammed, Osama A.
    • Journal of Power Electronics
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    • v.11 no.4
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    • pp.490-498
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    • 2011
  • This paper presents a novel analysis, design, and implementation of a battery charging three-phase high frequency semi-controlled power converter feasible for plug-in hybrid electric vehicles. The main advantages of the proposed topology include high efficiency; due to lower power losses and reduced number of switching elements, high output power density realization, and reduced passive component ratings proportionally to the frequency. Additional advantages also include grid economic utilization by insuring unity power factor operation under different possible conditions and robustness since short-circuit through a leg is not possible. A high but acceptable total harmonic distortion of the generator currents is introduced in the proposed topology which can be viewed as a minor disadvantage when compared to traditional boost rectifiers. A hysteresis control algorithm is proposed to achieve lower current harmonic distortion for the rectifier operation. The rectifier topology concept, the principle of operation, and control scheme are presented. Additionally, a dc-dc converter is also employed in the rectifier-battery connection. Test results on 50-kHz power converter system are presented and discussed to confirm the effectiveness of the proposed topology for PHEV applications.

Cascaded H-Bridge Five Level Inverter for Grid Connected PV System using PID Controller

  • Sivagamasundari, M.S.;Mary, P. Melba
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.4
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    • pp.451-462
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    • 2016
  • Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

Design and Feedback Performance Analysis of the Inverter-side LC Filters Used in the DVR System (DVR시스템에 사용되는 인버터부의 LC필터 설계와 피드백 성능분석)

  • Park, Jong-Chan;Shon, Jin-Geun
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.2
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    • pp.79-84
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    • 2015
  • Voltage sags are considered the dominant disturbances affecting power quality. Dynamic voltage restorers(DVRs) are mainly used to protect sensitive loads from the electrical network voltage disturbances such as sags or swells and could be used to reduce harmonic distortion of ac voltages. The typical DVR topology essentially contains a PWM inverter with LC Filter, an injection transformer connected between the ac voltage line and the sensitive load, and a DC energy storage device. For injecting series voltage, the PWM inverter is used and the passive filter consist of inductor(L) and capacitor(C) for harmonics elimination of the inverter. However there are voltage pulsation responses by the characteristic of the LC passive filter that eliminate the harmonics of the PWM output waveform of the inverter. Therefore, this paper presented design and feedback performance of LC filter used in the DVRs. The voltage control by LC filter should be connected in the line side since this feedback method allows a relatively faster dynamic response, enabling the elimination of voltage notches or spikes in the beginning and in the end of sags and strong load voltage THD reduction. Illustrative examples are also included.

A Study on Harmonic Reduction of Single-phase UPS with Variable Passive Harmonic Filters (가변형 수동 고조파 필터에 의한 단상 무정전전원장치의 고조파 저감에 관한 연구)

  • Kim, Sung-Sam;Hwang, Seon-Hwan
    • Journal of IKEEE
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    • v.23 no.2
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    • pp.495-501
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    • 2019
  • This paper proposes a variable passive harmonic filter for reduction and improvement of harmonics and power factor of single-phase uninterruptible power supply(UPS) with full bridge rectifier. Recently, UPSs have excellent harmonic and power factor operation characteristics by applying 2-level or more levels of power conversion methods. On the other hand, the single-phase UPS of the full bridge rectifier seriously causes the third, fifth, and seventh harmonics, and the power factor reduction on the grid side. Therefore, we present a variable passive harmonic filter for eliminating (2n+1) order harmonics and improving the power factor generated by the full bridge rectifier operation. In order to evaluate the performance of the proposed variable harmonic filter, the its validity is verified by various simulations and experiments.

Subsection Synchronous Current Harmonic Minimum Pulse Width Modulation for ANPC-5L Inverter

  • Feng, Jiuyi;Song, Wenxiang;Xu, Yuan;Wang, Fei
    • Journal of Electrical Engineering and Technology
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    • v.12 no.5
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    • pp.1872-1882
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    • 2017
  • Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

A Novel Digital Lock-In Amplifier Based Harmonics Compensation Method for the Grid Connected Inverter Systems (계통연계 인버터를 위한 디지털 록인 앰프 기반의 새로운 고조파 보상법)

  • Amin, Saghir;Ashraf, Muhammad Noman;Choi, Woojin
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.5
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    • pp.358-368
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    • 2020
  • Grid-connected inverters (GCIs) based on renewable energy sources play an important role in enhancing the sustainability of a society. Harmonic standards, such as IEEE 519 and P1547, which require the total harmonic distortion (THD) of the output current to be less than 5%, should be satisfied when GCIs are connected to a grid. However, achieving a current THD of less than 5% is difficult for GCIs with an output filter under a distorted grid condition. In this study, a novel harmonic compensation method that uses a digital lock-in amplifier (DLA) is proposed to eliminate harmonics effectively at the output of GCIs. Accurate information regarding harmonics can be obtained due to the outstanding performance of DLA, and such information is used to eliminate harmonics with a simple proportional-integral controller in a feedforward manner. The validity of the proposed method is verified through experiments with a 5 kW single-phase GCI connected to a real grid.

High Performance Piezoelectric Microspeakers and Thin Speaker Array System

  • Kim, Hye-Jin;Koo, Kun-Mo;Lee, Sung-Q;Park, Kang-Ho;Kim, Jong-Dae
    • ETRI Journal
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    • v.31 no.6
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    • pp.680-687
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    • 2009
  • This paper reports on an improved piezoelectric microspeaker with a high sound pressure level of 90 dB, a total harmonic distortion of less than 15%, and coherence higher than 0.9. The fabricated Pb(Zr,Ti)$O_3$ (PZT) microspeakers have a thickness of only 1 mm including the speaker frame and an active area of 18 mm${\times}$20 mm. To achieve higher sound pressure and lower distortion, the PZT piezoelectric microspeaker has a well-designed speaker frame and a piezoelectric diaphragm consisting of a tilted PZT membrane and silicone buffer layer. From the simulation and measurement results, we confirmed that the silicon buffer layer can lower the first resonant frequency, which enhances the microspeaker's sound pressure at a low frequency range and can also reduce useless distortion generated by the harmonics. The fabricated PZT piezoelectric microspeakers are implemented on a multichannel speaker array system for personal acoustical space generation. The output sound pressure at a 30 cm distance away from the center of the speaker line array is 15 dB higher than the sound pressure at the neighboring region 30 degrees from the vertical axis.

Flyback AC-DC Converter with Low THD Based on Primary-Side Control

  • Chang, Changyuan;He, Luyang;Cao, Zixuan;Zhao, Dadi
    • Journal of Power Electronics
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    • v.18 no.6
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    • pp.1642-1649
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    • 2018
  • A single-stage flyback LED AC-DC converter based on primary-side control under constant current mode is proposed in this study. The proposed converter features low total harmonic distortion (THD) and high power factor (PF). It also consists of a zero-crossing distortion compensation circuit and a variable duty ratio control compensation circuit to deal with the line current distortions caused by fixed duty ratio control. The system model and layout are built in Simplis and Cadence, respectively. The feasibility and performance of the proposed circuit is verified by designing and fabricating an IC controller in the HHNEC $0.35{\mu}m$ 5 V/40 V HVCMOS process. Experimental results show that the PF can reach a level in the range of 0.985-0.9965. Moreover, the average THD of the entire system is approximately 10%, with the minimum being 6.305%, as the input line voltage changes from 85 VAC to 265 VAC.

Energy Yield, Power Quality and Grid Integration of Wind Energy Converters

  • Hanitsch R. E.
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.5B no.2
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    • pp.97-102
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    • 2005
  • Because of the limited fossil resources and the need to avoid emissions and toxic waste the future energy supply will be based on a large portion of renewable energies: wind-, solar-, biomass- and geothermal energy. Focus is on the utilization of wind energy coming from onshore- and offshore-sites. Generating electricity from wind is state of the art and feeding large amounts of wind power into the electrical grid will create some additional problems. Suggestions concerning energy storage will be made and the problem of power quality is discussed.

Voltage-Mode CMOS Squarer/Multiplier Circuit

  • Bonchu, B.;Surakampontorn, W.
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.646-649
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    • 2002
  • In this paper, a low-voltage CMOS squarer and a four-quadrant analog multiplier are presented. It is based on a source-coupled pair and a scaled-floating voltage generator which are modified to work as a voltage squaring and a sum/difference circuits. The proposed squarer/multiplier have been simulated with HSPICE, where -3㏈ bandwidth of 10MHz is achieved. The power consumption is about 0.6㎽, from a ${\pm}$1.5V supply, and the total harmonic distortion is less than 0.7%, with a 1.2V peak-to-peak 1MHz input signal.

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