• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.4
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• pp.258-264
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• 2004

This paper propose a method that GOP structure based on the picture complexity change realtime adaptive without pre-analysis or time delay. Proposed algorithm calculates the complexity of pictures at first, and the ratio of the complexity( X$\sub$p/ /X$\sub$i/) between P picture and I picture is calculated. The suitable M value for the three picture select by comparing with predetermined threshold. Used bit and vbv_delay the value of GOP is calculated according to selected M. Experimental results show that the prediction error is reduce than the fixed GOP structure. Since the complexity distribution of the sequence is different, applied limits of threshold value is changed, also.

• Journal of Positioning, Navigation, and Timing
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• v.11 no.2
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• pp.91-98
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• 2022

In the next generation wireless communication system, the beamforming technique based on a massive antenna is one of core technologies for transmitting and receiving huge amounts of data, efficiently and accurately. For highly performed and highly reliable beamforming, it is required to accurately estimate the Angle of Arrival (AOA) for the desired signal incident to an antenna. Employing the massive antenna with a large number of elements, although the accuracy of the AOA estimation is enhanced, its computational complexity is dramatically increased so much that real-time communication is difficult. In order to improve this problem, AOA estimation algorithms based on the massive antenna with the low computational complexity have been actively studied. In this paper, we compute and analyze the computational complexity of the cascade AOA estimation algorithm based on the Flexible Massive Concentric Circular Array (FMCCA). In addition, its computational complexity is compared to conventional AOA estimation techniques such as the Multiple Signal Classification (MUSIC) algorithm with the high resolution and the Only Beamspace MUSIC (OBM) algorithm.

• The KIPS Transactions:PartC
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• v.11C no.3
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• pp.345-352
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• 2004

Recently, contents distribution technologies have been used to cope with the explosive demand for Web services. In this paper, we addressed the issue of the optimal placement of replicas in the environment where Web contents are replicated. We placed replicas so that clients can have access to replicas with the proper delay and bandwidth. We attempted to solve the problem via dynamic programming considering cost of delay and traffic We have come up with time complexity that is less than $O(n^2)$. We defined the threshold and proved that our algorithm guarantees the reliable services.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.2
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• pp.50-60
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• 1997

Reconfiguration of a memory array using spare rows and columns has been known to be a useful technique to improve the yield. When the numbers of spare rows and scolumns are limited, respectively, the repair problem is known to be NP-complete. In this paper, we propose the reconfiguration algorithm for an array of memory cells using faulty cel clustering, which removes rows and columns algrithm is the simplest reconfiguration method with the time complexity of $O(n^2)$, where n is the number of faulty cells, however the repair rate is very low. Whereas the exhaustive search algorithm has a high repair rate, but the time complexity is $O(2^n)$. The proposed algorithm provides the same repair rate as the exhaustive search algorithm for almost all cases and runs as fast as the greedy method. It has the time complexity of $O(n^3)$ in the worst case. We show that the propsed algorithm provides more efficient solutions than other algorithms using simulations.

• ETRI Journal
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• v.30 no.6
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• pp.807-817
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• 2008

We present a low-density parity-check (LDPC)-based, threaded layered space-time-frequency system with emphasis on the iterative receiver design. First, the unbiased minimum mean-squared-error iterative-tree-search (U-MMSE-ITS) detector, which is known to be one of the most efficient multi-input multi-output (MIMO) detectors available, is improved by augmentation of the partial-length paths and by the addition of one-bit complement sequences. Compared with the U-MMSE-ITS detector, the improved detector provides better detection performance with lower complexity. Furthermore, the improved detector is robust to arbitrary MIMO channels and to any antenna configurations. Second, based on the structure of the iterative receiver, we present a low-complexity belief-propagation (BP) decoding algorithm for LDPC-codes. This BP decoder not only has low computing complexity but also converges very fast (5 iterations is sufficient). With the efficient receiver employing the improved detector and the low-complexity BP decoder, the proposed system is a promising solution to high-data-rate transmission over selective-fading channels.

• The Journal of the Acoustical Society of Korea
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• v.21 no.5
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• pp.438-445
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• 2002

In this paper, the necessity of the filter coefficients compensation for the lattice transversal joint (LTJ) adaptive filter was explained in general and with ease by analyzing it with respect to the time-varying transform domain adaptive filter. And also the reduction method of computational complexity for filter coefficients compensation was proposed using the property that speech signal is stationary during a short time period and its effectiveness was verified through experiments using artificial and real speech signals. The proposed adaptive filter reduces the computational complexity for filter coefficients compensation by 95%, and when the filter is applied to the acoustic echo canceller with 1000 taps, the total complexity is reduced by 82%.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.6
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• pp.436-445
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• 2001

In this paper, we introduce modulo ( 2$^n$-1) parallel-processing residue multipliers, using Op Amp circuits, and their technological application to designing binary multipliers. The limit of multiplying speed in computational processing is a serious harrier in the advances of VLSI technology. To solve this problem, we implement a class of modulo ( 2$^n$-1) parallel multipliers having superior time complexity to O( log$_2$( log$_2$( log$_2$$^n$))) by applying Op Amp circuits, while investigating their technological application to binary multipliers. Since they have excellent time & area complexity compared with previous parallel multipliers, and are applicable to designing binary multipliers of the same efficiency, such parallel multipliers possess high academic value. Indexing Terms Modular Multipliers. Binary Multipliers. Parallel Processing, Operational Amplifiers, Mersenne Numbers.

• Proceedings of the IEEK Conference
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• summer
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• pp.302-309
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• 2004

The transmission capacity of wireless communication systems may become dramatically high by employ multiple transmit and receive antennas with space-time coding techniques appropriate to multiple transmit antennas. For large number of transmit antennas and at high bandwidth efficiencies, the receiver may become too complex whenever correlation across transmit antennas is introduced. Reducing decoding complexity at receiver by combining array processing and space-time codes (STC) helps a communication system using STC to overcome the big obstacle that prevents it from achieving a desired high transmission rate. Multi-carrier CDMA (MC-CDMA) allows providing good performance in a channel with high inter-symbol interference. Antenna array, STC and MC-CDMA system have a similar characteristic that transmit-receive data streams are divided into sub-streams. Thus, there may be a noticeable reduction of receiver complexity when we combine them together. In this paper, the combination of array processing and STC in MC-CDMA system over slow selective-fading channel is investigated and compared with corresponding existing MC-CDMA system using STC. A refinement of this basic structure leads to a system design principle in which we have to make a trade off between transmission rate, decoding complexity, and length of spreading code to reach a given desired design goal.

• The Transactions of the Korea Information Processing Society
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• v.2 no.3
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• pp.433-442
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• 1995

This paper presents an improved VLSI implementation of a parallel sorter to achieve O(Ν) time complexity. Many fast VLSI sort algorithms have been proposed for sorting N elements in O(log Ν) time. However, most such algorithms proposed have complex network structure without considering data input and output time. They are also very difficult to expand or to use in real applications. After analyzing the chip area and time complexity of several parallel sort algorithms with overlapping data input and output time, the most effective algorithm, the rebound sort algorithm, is implemented in VLSI with some improvements. To achieve O(Ν) time complexity, an improved rebound sorter is able to sort 8 16-bits records on a chip. And it is possible to sort more than 8 records by connecting chips in a chain vertically.

• Journal of Internet Computing and Services
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• v.17 no.5
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• pp.59-65
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• 2016

Recently, a study has been progressed about the energy storage system for resolving energy shortage problems in the world. The energy storage system can maximize energy storage system's energy usage by monitoring and controlling about all energy infrastructures on energy network. However, compatibility problems among main components or devices of the energy storage system are obstacles to development of energy storage system products. An extensible profile and extensible profile verification software being able to verify the extensible profile have been required in order to resolve compatibility problems. In this paper, the study on complexity analysis for the extensible profile verification software for the energy storage system is performed. A XML based profile and C language structure based profile are used for analysis of the profile verification software. The complexity of complex verification structure that parses the XML based profile several times and simple verification structure that parses the C language structure based profile are analyzed and compared. Time complexity, space complexity, and cyclomatic complexity are used for complexity analysis. By using these complexity analysis, the study result that compares and analyzes the complexity of XML based and C language structure based profile verification software is presented.