• Proceedings of the KAIS Fall Conference
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• 2010.05b
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• pp.1233-1236
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• 2010

본 연구에서는 메탄을 물질로 산화실험을 수행하였다. 메탄의 발화온도가 탄화수소 중에 가장 높으며, 대부분의 전이금속촉매 활성온도가 가장 높게 나타나는 물질이므로 메탄의 연소가 일어날 경우 대부분의 탄화수소류는 연소가 일어날 수 있으므로 메탄의 산화반응을 연구하였다. 메탄의 산화를 위한 전이금속 촉매중 망간을 산화물형태로 $Al_2O_3$, $TiO_2$에 담지하여 메탄에 대한 활성능을 측정하였으며, 조촉매로 금속산화물을 이용하여 활성능의 변화를 연구하였다. 또한 자연에 존재하는 천연망간광석과 금속산화물을 담지하여 최적의 메탄에 대한 활성능을 지닌 촉매를 선별하였다. 조촉매로는 Ce, Sn, Ni, Co, Mo 등을 이용하였다. 또한 본 연구에서는 촉매 제조는 과잉용액함침법을 사용하여 담지체에 촉매물질을 분산하였으며, 온도와 유량에 대한 각 조성 촉매의 활성능을 측정하여 활성화에너지 및 $T_{50}$, $T_{90}$을 도출하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.32 no.6
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• pp.501-506
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• 2019

To overcome the limitations of the conventional Ni anode-supported SOFCs, various types of ceramic anodes have been studied. However, these ceramic anodes are difficult to commercialize because of their low cell performances and difficulty in manufacturing anode-support typed SOFCs. Therefore, in this study, to use these ceramic anodes and take advantage of anode-supported SOFC, which can minimize ohmic loss from the thin electrolyte, we fabricated cathode support-typed SOFC. The cathode-support of LSCF-YSZ was prepared by the acid treatment of conventional Ni-YSZ (Yttria-stabilized Zirconia) anode-support, followed by the infiltration of LSCF to YSZ scaffold. The composite of $La(Sr)Ti(Ni)O_3$ and $Ce(Mn,Fe)O_2$ was used as the ceramic anode. The fabricated cathode-supported button cell showed a relatively low power density of $0.207Wcm^{-2}$ at $850^{\circ}C$; however, it is expected to show better performance through the optimization of the infiltration rate and thickness of LSCF-YSZ cathode-support layer.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.14 no.4
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• pp.2037-2042
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• 2013

A TCO-less palladium (Pd) catalytic layer on the glass substrate was assessed as the counter electrode (CE) in a dye sensitized solar cell (DSSC) to confirm the stability of Pd with the $I^-/I_3{^-}$electrolyte on the DSSC performance. A 90nm-thick Pd film was deposited by a thermal evaporator. Finally, DSSC devices of $0.45cm^2$ with glass/FTO/blocking layer/$TiO_2$/dye/electrolyte(10 mM LiI + 1 mM $I_2$ + 0.1 M $LiClO_4$ in acetonitrile solution)/Pd/glass structure was prepared. We investigated the microstructure and photovoltaic property at 1 and 12 hours after the sample preparation. The optical microscopy, field emission scanning electron microscopy (FESEM), cyclic voltammetry measurement (C-V), and current voltage (I-V) were employed to measure the microstructure and photovoltaic property evolution. Microstructure analysis showed that the corrosion by reaction between the Pd layer and the electrolyte occurred as time went by, which led the decrease of the catalytic activity and the efficiency. I-V result revealed that the energy conversion efficiency after 1 and 12 hours was 0.34% and 0.15%, respectively. Our results implied that we might employ the other non-$I^-/I_3{^-}$electrolyte or the other catalytic metal layers to guarantee the long term stability of the DSSC devices.

• Journal of Korean Society for Atmospheric Environment
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• v.19 no.6
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• pp.701-717
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• 2003

The objective of this study was to extensively estimate the air quality trends of the study area by surveying con-centration trends in months or seasons, after analyzing the mass concentration of PM-10 samples and the inorganic lements, ion, and total carbon in PM-10. Also, the study introduced to apply the PMF (Positive Matrix Factoriza-tion) model that is useful when absence of the source profile. Thus the model was thought to be suitable in Korea that often has few information about pollution sources. After obtaining results from the PMF modeling, the existing sources at the study area were qualitatively identified The PM-10 particles collected on quartz fiber filters by a PM-10 high-vol air sampler for 3 years (Mar. 1999∼Dec.2001) in Kyung Hee University. The 25 chemical species (Al, Mn, Ti, V, Cr, Fe, Ni, Cu, Zn, As, Se, Cd, Ba, Ce, Pb, Si, N $a^{#}$, N $H_4$$^{+}$, $K^{+}$, $Mg^{2+}$, $Ca^{2+}$, C $l^{[-10]}$ , N $O_3$$^{[-10]}$ , S $O_4$$^{2-}$, TC) were analyzed by ICP-AES, IC, and EA after executing proper pre - treatments of each sample filter. The PMF model was intensively applied to estimate the quantitative contribution of air pollution sources based on the chemical information (128 samples and 25 chemical species). Through a case study of the PMF modeling for the PM-10 aerosols. the total of 11 factors were determined. The multiple linear regression analysis between the observed PM-10 mass concentration and the estimated G matrix had been performed following the FPEAK test. Finally the regression analysis provided source profiles (scaled F matrix). So, 11 sources were qualitatively identified, such as secondary aerosol related source, soil related source, waste incineration source, field burning source, fossil fuel combustion source, industry related source, motor vehicle source, oil/coal combustion source, non-ferrous metal source, and aged sea- salt source, respectively.ively.y.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.339-339
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• 2002

In the RABiTS approach to coated conductor development, successful (both economic and technological) depends on the refinement and optimization of each of three important components: the metal tape substrate, the buffer layer(s), and the HTS layer. Here we will report on the ORNL approach and progress in each of these areas. - Most applications will require metal tapes with low magnetic hysteresis, mechanical strength, and excellent crystalline texture. Some of these requirements are competing. We report on progress in obtaining a good combination of these characteristics on metal alloys of Ni-Cr and Ni-W. - The deposition of appropriate buffer layers is a crucial step. Recently, base research has shown that the presence of a stable sulfur superstructure present on the metal surface is needed for the nucleation and epitaxial growth of vapor-deposited seed buffer layers such as YSZ, CeO$_2$ and SrTiO$_3$. We report on the details and control of this superstructure for nickel tapes, as well as recent results for Cu and Ni-13%Cr. - Processes for deposition of the HTS coating must economically provide large values of the figure-of-merit for conductors, current x length. At ORNL, we have devoted efforts to a precursor/post-annealing approach to YBCO coatings, for which the deposition and reaction steps are separate. We describe motivation for and progress toward developing this approach. - Finally, we address some issues for the implementation of coated conductors in real applications, including the need for texture control and electrical stabilization of the HTS coating.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.98-103
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• 2013

The alumina substrates that Ni electrode was printed on and the multi-layered PTCR thermistors of which composition is $(Ba_{0.998}Ce_{0.002})TiO_3+0.001MnCO_3+0.05BN$ were fabricated by a thick film process, and the effect of re-oxidation temperature on their resistivities and resistance jumps were investigated, respectively. Ni electroded alumina substrate and the multi-layered PTC thermistor were sintered at $1150^{\circ}C$ for 2 h under $PO_2=10^{-6}$ Pa and then re-oxidized at $600{\sim}850^{\circ}C$ for 20 min. With increasing the re-oxidation temperature, the room temperature resistivity increased and the resistance jump ($LogR_{290}/R_{25}$) decreased, which seems to be related to the oxidation of Ni electrode. The small sized chip PTC thermistor such as 2012 and 3216 exhibits a nonlinear and rectifying behavior in I-V curve but the large sized chip PTC thermistor such as 4532 and 6532 shows a linear and ohmic behavior. Also, the small sized chip PTC thermistor such as 2012 and 3216 is more dependent on the re-oxidation temperature and easy to be oxidized in comparison with the large sized chip PTC thermistor such as 4532 and 6532. So, the re-oxidation conditions of chip PTC thermistor may be determined by considering the chip size.