• Proceedings of the KIEE Conference
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• 2008.10b
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• pp.217-218
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• 2008

Since the digital TV signal band is very wide ($54{\sim}806MHz$), the VCO used in the frequency synthesizer must also have a wide frequency tuning range. Multiple LC VCOs have been used to cover such wide frequency band. However, the chip area increases due to the increased number of integrated inductors. A general method for achieving both reduced VCO gain(Kvco) and wide frequency band is to use the switched-capacitor bank LC VCO. In this paper, a scheme is proposed to cover the full band using only one VCO. The RF VCO block designed using a 0.18um CMOS process consists of a wideband LC VCO with reduced variation of VCO gain and frequency steps. Buffers, divide-by-2 circuits and control logics the simulation results show that the designed circuit has a phase noise at 100kHz better than -106dBc/Hz throughout the signal band and consumes $9.5{\sim}13mA$ from a 1.8V supply.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.4
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• pp.805-817
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• 1999

In this paper, the needs for introduction and adoption of MㆍHF DSC/NBDP system and for developments of its circuits and call sequences for use in the maritime mobile services for small-ships, leisure-ships and fishing ships are analyzed, discussed. Also design and implement for MㆍHF(1.6-4MHz) DSC/NBDP system is discussed. Most of casualties have been arisen from small-ships and fishing ships during last 5 years. So, the SAR schematic plans should been prepared to prevent casualties and facilitate the activities of SAR for those ships. DSC/NBDP for MㆍHF system is able to fulfill the roles of efficient SAR communication functions, and to advance the SAR system to small ships and fishing ships. This study is focused on the techniques of processing the DSC call sequences and the ARQ sequences of NBDP system. Especially ARQ sequences are expanded into processing of Korean letters, designed the call sequences and code conversion algorithm for Korean-code. It will be evaluated the availability of Korean-NBDP system. In designing the Transmitting circuits and Receiving circuits, for the carrier generation, DDS(Direct Digital Synthesizer) is used in stead of the Phase Locked Loop and frequency conversion by the mixer, BPF. And PSK modulation signals are directly generated by the controls of DDS, which show the characteristics of Spurious Free Dynamic Range are below -62dBc. Also, the monolithic U subsystem IC which provides various functional components, AD608 is used for designing the receiving circuitsㆍAnd the algorithm of Phasing methode for FSK demodulation are devised to process IF frequency 455kHz in the IF circuits.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.4
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• pp.819-830
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• 1999

NAVTEX system is an international automated direct-printing service, broadcast on 5181kHz and 490kHz, for the promulgation of navigational and meteorological warnings and urgent information to ships. With our government's adoption of the international convention for SAR(Search and Rescue) in 1993, various trials for the installation of NAVTEX system have been executed by the government committee, relating laboratory and experts. An important consideration of the installation for NAVTEX system is the availability that could broadcast messages written in korean letter. Also, the receiver which can process the signal demodulated from the two frequencies, 518kHz and 490kHz, should be developed and supplied in domestic. In this paper, the code table and algorithm for conversions between NAVTEX characters and Korean Letters are studied, and signal processing techniques of code conversion are developed. Circuit design and implementation of the NAVTEX simulator using the Direct Digital Synthesizer are discussed, code conversion algorithm and signal processing technique of the NAVTEX transmission are programmed in its circuits. For evaluating the its functional characteristics, receiving module which has I-Q channel structure is designed. From the measurements of simulator, the characteristics show the frequency stability of the $(\pm)2Hz$ and Spurious free dynamic range is -63dBc. And the simulator can generate simultaneously wanted signal and several interfere signals. So, its capability is valuable for designers of the transmitting system and NAVTEX receiver, for provider as testing facilities of the type approval.

• Journal of the Korean Magnetics Society
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• v.7 no.6
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• pp.327-333
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• 1997

We designed and constructed the high frequency magnetic characteristics measurement system to measure core loss, B-H curve, permeability of toroidal ferrite core, amorphous core and various materials for high frequency application. The system consists of universal equipments such as digitizing oscilloscope, signal generator, power amplifier, PC in order to make upgrade easily. The power source is composed of waveform synthesizer and power amplifier ranging from DC to 20 MHz, and output signal H and B from sample core are digitized by oscilloscope with sampling rate 1 GS/ s per channel. Computer controls power source and oscilloscope, reads data from oscilloscope, displays analyzed waveform and saves data with file. The entire procedures finishes within few seconds.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.9
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• pp.974-978
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• 2003

The down-converter of the WCDMA Digital Optic Repeater is developed. Based on the system specifications, the structure of the down-converter is accomplished and its block diagram is drawn. The down-converter is implemented according to these block diagrams. Subsequently a low pass filter, an automatic level controlled attenuator, a frequency synthesizer and other components for the down-converter are designed and implemented, and a main board to integrate these modules is also manufactured. To reduce the noise floor of system and suppress the RF spurious noise, a PCB layout is performed carefully. For each module consisting of the down-converter and the entire system, the performance tests are accomplished to check the performance about the specifications.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.8
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• pp.1283-1291
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• 2002

In this paper, the PLL driven by the DDFS is designed on the schematic using the Q-logic cell based library and is implemented using FPGA QL32 x16B. The measurement results of the frequency synthesizer switching speed were agreement with a register. The simulated results show that the clock delay was generated after eleven clock and if input is random, It has influence on output DA converter has to be very extensive. Therefore, the DDFS used noise shaper to drive PLL by regular interval for input state. Also the bandwidth of DA converter very extensive, the simulation shows that the variation of small input control word is better than the switching speed of PLL.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.5
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• pp.97-102
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• 2018

In this paper, W-band Waveform Generator for compact radar has been designed and fabricated. DDS (Direct Digital Synthesizer) is applied to generate CW (Continuous Wave) and FMCW (Frequency Modulation Continuous Wave) waveform at high speed. We designed two LO (Local Oscillator) paths for functions of distance delay and distance tracking tests at the prpposed system without extra test equipment. Two mode selections are provided by switch. It is observed that fabricated waveform generator performs -91 dBc/Hz phase noise at offset 1 kHz and -63.2 dBc spurious. Proposed W-band Waveform Generator is expected to apply for W-band compact radar transceiver module.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.5
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• pp.854-859
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• 2009

Many pilot projects are developed using USN(Ubiquitous Sensor network). Recently USN has more attention to be used for the applications of circumstance monitoring. In order to acquire information from sensor nodes, sensor nodes need a RF transceiver. In this paper we describe the design of a RF transceiver, based on IEEE 802.15.4, for sensor nodes operating in 2.4GHz frequency band. The architecture to be implemented and the electrical performance specifications satisfied IEEE 802.15.4 are presented. The noise figure of a receiver, selectivity, phase noise of a frequency synthesizer, transmitter's linearity and spectrum mask are derived as a design parameters from the specifications of IEEE 802.15.4.

• Phonetics and Speech Sciences
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• v.5 no.3
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• pp.63-69
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• 2013

The purpose of this study was to evaluate the maximum and optimal listening speed of Korean TTS for the blind. Five blind participants took part in this study. The instruments used in this study were 17 sentence sets (2 sets for an excercise, 10 sets for a repeated test, and 5 sets for a random test), with short meaningful sentences (the same sentences for the repeated test, different sentences for the random test) with 15 differentiated speeds (Range=0.8-3.6, SD=0.2). Each participant's maximum and quickest listening speeds were calculated by objective recall accuracy (determined by the number of correctly recalled syllables/the total number of syllables in a sentence X 100) and subjective recall accuracy (recall accuracy judged by each participant's subjective evaluation). The results showed that the participants' recall accuracy had a tendency to increase as the TTS speed decreased. Participants' subjective recall accuracy was higher than objective recall accuracy in the repeated tests and vice versa in the random tests. The results also revealed that the participants' sentence familiarity had an influence on their Korean TTS listening speed.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.12
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• pp.1197-1202
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• 2009

We present a power-efficient driving scheme that consists of piezoelectric actuator and driver IC for AF (Auto-Focus) on ISM (Image Sensor Module). The piezoelectric actuator is more power-efficient than conventional voice coil motor actuator. And high power-efficiency driver IC is designed. So the proposed driving scheme using designed piezoelectric actuator and driver IC is more close to recent trend of green IT. The diver IC should guarantee fast and accurate performance. So, the optimum driving method and high accurate frequency synthesizer are proposed. The die area of designed driver IC is $2.0{\times}1.6mm^2$ and power consumption is 2.8mW.