• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.3
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• pp.204-212
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• 2020

In this study, device suitability analysis is performed by comparing the performance of SiC MOSFET and GaN Transistor, which are WBG power semiconductor devices in the induction heating (IH) system. WBG devices have the advantages of low conduction resistance, switching losses, and fast switching due to their excellent physical properties, which can achieve high output power and efficiency in IH systems. In this study, SiC and GaN are applied to a general half-bridge series resonant converter topology to compare the conduction loss, switching loss, reverse conduction loss, and thermal performance of the device in consideration of device characteristics and circuit conditions. On this basis, device suitability in the IH system is analyzed. A half-bridge series resonant converter prototype using the SiC and GaN of a 650-V rating is constructed to verify device suitability through performance comparison and verified through an experimental comparison of power loss and thermal performance.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.88-93
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• 2016

This paper presents a method of constructing the highly performance switching circuit(HPSC) over finite fields. The proposed method is as following. First of all, we extract the input/output relationship of linear characteristics for the given digital switching functions, Next, we convert the input/output relationship to Directed Cyclic Graph using basic gates adder and coefficient multiplier that are defined by mathematical properties in finite fields. Also, we propose the new factorization method for matrix characteristics equation that represent the relationship of the input/output characteristics. The proposed method have properties of generalization and regularity. Also, the proposed method is possible to any prime number multiplication expression.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.6
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• pp.417-423
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• 2016

Using a sliding mode controller and observer techniques, this paper presents a robust current controller for a DC motor in the presence of parametric uncertainties. One of the most important issues in the practical application of sliding mode schemes is the chattering phenomenon caused by switching actions. This paper presents a novel sliding mode controller that incorporates an integral control with a sliding mode disturbance observer to attenuate the chattering by reducing the controller/observer switching gains. The proposed sliding mode disturbance observer is designed to estimate a relatively slow varying signal in the equivalent lumped disturbance owing to system uncertainties. Combining the estimated uncertainty with the sliding mode control input, the proposed controller can achieve the control objective by using the relatively low gain of the controller. The proposed disturbance observer does not include the switching control input of the baseline sliding mode controller to reduce the observer switching gain. In the proposed approach, the integral sliding mode control is used to improve the steady state control performance. Comparative computer simulations are carried out to demonstrate the performance of the proposed method. Through the simulation results, the proposed controller realizes the robust performance with reduced current ripples.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.2
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• pp.72-78
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• 2008

The speed variation of SRM is fulfilled throughout a transition from chopping control to single pulse operation. (i,e., low speed to high speed operation). It is unsatisfied with performance at all operational regimes. In this paper, the operational performance of SRM can be improved by using current hysteresis control method. This method maintains a generally flat current waveform. At the high speed, the current chopping capability is lost due to the development of the back-EMF. Therefore SRM operates in single pulse mode. By using zero-current switching and zero-voltage switching technique, the stress of power switches can be reduce in chopping mode. When the commutation from one phase winding to another phase winding, the current can be zero as fast as possible in this period because several times negative voltage of DC-source voltage produce in phase winding. This paper is compared to performance based on conventional C-dump converter topology and the proposed resonant C-dump converter topology. Simulation and experimental results are presented to verify the effectiveness of the proposed circuit.

• Journal of Electrical Engineering and Technology
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• v.11 no.4
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• pp.829-838
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• 2016

This paper focuses on the engineering trade-offs in designing capacitor voltage balancing schemes for modular multilevel converters (MMC) HVDC: regulation performance and switching loss. MMC is driven by the on/off switch operation of numerous submodules and the key design concern is balancing submodule capacitor voltages minimizing switching transition among submodules because it represents the voltage regulation performance and system loss. This paper first introduces the state-of-the-art MMC-HVDC submodule capacitor voltage balancing methods reported in the literatures and discusses the trade-offs in designing these methods for HVDC application. This paper further proposes a submodule capacitor balancing scheme exploiting a control signal to flexibly interchange between the on-state and the off-state submodules. The proposed scheme enables desired performance-based voltage regulation and avoids unnecessary switching transitions among submodules, consequently reducing the switching loss. The flexibility and controllability particularly fit in high-level MMC HVDC applications where the aforementioned design trade-offs become more crucial. Simulation studies for MMC HVDC are performed to demonstrate the validity and effectiveness of the proposed capacitor voltage balancing algorithm.

• Journal of Power Electronics
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• v.4 no.1
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• pp.46-55
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• 2004

This paper presents a high-frequency ZVS-PWM boost chopper-fed DC-DC converter with a single active auxiliary edge resonant snubber in the load-side which can be designed for power conditioners such as solar photovoltaic generation, fuel cell generation, battery and super capacitor energy storages. Its principle operation in steady-state is described in addition to a prototype setup. The experimental results of ZVS-PWM boost chopper-fed DC-DC converter proposed here, are evaluated and verified with a practical design model in terms of its switching voltage and current waveforms, the switching v-i trajectory, the temperature performance of IGBT module, the actual power conversion efficiency and the EMI of radiated and conducted emissions. And then discussed and compared with the hard switching scheme from an experimental point of view. Finally, this paper proposes a practical method to suppress parasitic oscillation due to the active auxiliary resonant switch at ZCS turn off mode transition with the aid of an additional lossless clamping diode loop, and reduced the EMI conducted emission in this paper.

• Proceedings of the KIPE Conference
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• 2007.11a
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• pp.115-117
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• 2007

This paper is analyzed for DC-DC chopper performance of high efficiency added in electric isolation. The general converters of high efficiency are made that the power loss of the used switching devices is minimized. To achieve high efficiency system, the proposed chopper is constructed by using a partial resonant circuit. The control switches using in the chopper are operated with soft switching for a partial resonant method. The control switches are operated without increasing their voltage and current stresses by the soft switching technology. The result is that the switching loss is very low and the efficiency of chopper is high. And the proposed chopper is added in a electric isolation. When the power conversion system is required to electric isolation, the proposed chopper is adopted with system development of high efficiency. The soft switching operation and the system efficiency of the proposed chopper is verified by digital simulation and experimental results.

• Journal of Electrical Engineering and Technology
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• v.7 no.2
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• pp.236-239
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• 2012

In this paper, we study the transient characteristics of 4H-SiC DMOSFETs with different interface charges to improve the turn-on rising time. A physics-based two-dimensional mixed device and circuit simulator was used to understand the relationship between the switching characteristics and the physical device structures. As the $SiO_2$/SiC interface charge increases, the current density is reduced and the switching time is increased, which is due primarily to the lowered channel mobility. The result of the switching performance is shown as a function of the gate-to-source capacitance and the channel resistance. The results show that the switching performance of the 4H-SiC DMOSFET is sensitive to the channel resistance that is affected by the interface charge variations, which suggests that it is essential to reduce the interface charge densities in order to improve the switching speed in 4H-SiC DMOSFETs.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.9 no.10
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• pp.3921-3944
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• 2015

Currently Energy-Saving (ES) methods in cellular networks could be improved, as compensation method for irregular Base Station (BS) deployment is not effective, most regional ES algorithm is complex, and performance decline caused by ES action is not evaluated well. To resolve above issues, a low-complexity energy efficient BS cooperation mechanism for Long Time Evolution (LTE) networks is proposed. The mechanism firstly models the ES optimization problem with coverage, resource, power and Quality of Service (QoS) constraints. To resolve the problem with low complexity, it is decomposed into two sub-problems: BS Mode Determination (BMD) problem and User Association Optimization (UAO) problem. To resolve BMD, regional dynamic multi-stage algorithms with BS cooperation pair taking account of load and geographic topology is analyzed. And then a distributed heuristic algorithm guaranteeing user QoS is adopted to resolve UAO. The mechanism is simulated under four LTE scenarios. Comparing to other algorithms, results show that the mechanism can obtain better energy efficiency with acceptable coverage, throughput, and QoS performance.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1391-1401
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• 2017

In this paper, a secondary resonance half-bridge dc-dc converter with an inductive output filter is presented. The primary side of such a converter utilizes asymmetric pulse width modulation (APWM) to achieve zero-voltage switching (ZVS) of the switches, and clamps the voltage of the switch to the input voltage. In addition, zero current switching (ZCS) of the output diode is achieved by a half-wave rectifier circuit with a filter inductor and a resonant branch in the secondary side of the proposed converter. Thus, the switching losses and diode reverse-recovery losses are eliminated, and the performance of the converter can be improved. Furthermore, an inductive output filter exists in the converter reduce the output current ripple. The operational principle, performance analysis and design equation of this converter are given in this paper. The analysis results show that the output diode voltage stress is independent of the duty cycle, and that the voltage gain is almost linear, similar to that of the isolation Buck-type converter. Finally, a 200V~380V input, 24V/2A output experimental prototype is built to verify the theoretical analysis.