• Proceedings of the International Microelectronics And Packaging Society Conference
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• 1999.11a
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• pp.33-36
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• 1999

In this paper, we proposed a simultaneous switching noise(SSN) reduction technique in muti-layer beards(MLB) for high-speed digital applications and analyzed them using the Finite Difference Time Domain(FDTD) method. The new method by conductive dielectric substrates reduces SSN couplings and resonances, significantly, which cause series malfunctions in the modem high-speed digital applications.

• Proceedings of the KIPE Conference
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• 2001.07a
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• pp.698-701
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• 2001

Loss analyses of two soft switching techniques for two-transistor forward converters are presented. The sums of snubber conduction and capacitive turn-on losses for two transistors are calculated to compare the losses of two techniques. While the conventional soft switching technique shows the loss difference between two transistors, proposed soft switching technique shows equal as well as lower loss in two transistors.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.6
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• pp.35-41
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• 2000

This paper describes a merged-capacitor switching (MCS) technique to improve the signal Processing speed and resolution of CMOS analog-to-digital converters (ADCs). The proposed MCS technique improves a sampling rate by reducing the number of capacitors used in conventional pipelined ADCs. The ADC capacitor mismatch can be minimized without additional power consumption, die area, and the loss of sampling rate, when the size of each unit capacitor is increased as much as the number of capacitors reduced by the MCS technique. It is verified that the ADC resolution based on the proposed MCS technique is extended further by employing a conventional commutated feedback-capacitor switching (CFCS) technique.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.3 s.357
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• pp.1-6
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• 2007

A drain bias switching technique is presented to enhance power added efficiency for WiBro and wireless LAN dual band and dual mode transmitter. Some simulations have been done to predict the effect of drain and gate bias change, and bias switching is proposed to get the higher efficiency for dual mode transmitter which generates different output power for different applications. With drain bias switching and simulated optimum fixed gate bias, the amplifier shows dramatic PAE improvement compared to the amplifier without bias switching. The drain and gate bias switching technique will be useful for multi mode communication system with various functions.

• Journal of Power Electronics
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• v.17 no.4
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• pp.1097-1108
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• 2017

Accurate calculation of the conduction and switching losses of a power electronic converter is required to achieve the efficiency of the converter. Such calculation is also useful for computing the junction temperature of the switches. A few models have been developed in the articles for calculating the switching energy losses during switching transitions for the given values of switched voltage and switched current. In this study, these models are comprehensively reviewed and investigated for the first time for ease of comparison among them. These models are used for calculating the average amount of switching power losses. However, some points and details should be considered in utilizing these models when switched current or switched voltage presents time-variant and alternative quantity. Therefore, an applicable technique is proposed in details to use these models under the above-mentioned conditions. A proper switching loss model and the presented technique are used to establish a new and fast method for obtaining the average switching power losses in any type of power electronic converters. The accuracy of the proposed method is evaluated by comprehensive simulation studies and experimental results.

• ETRI Journal
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• v.20 no.2
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• pp.115-132
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• 1998

This paper proposes an extended service filtering technique to prevent overload in service control point (SCP) due to televoting (VOT) or mass calling (MAS) services with the heavy traffic characteristics. Also, this paper compares this extended technique with the existing overload control techniques, and calculates steady state call blocking probabilities in intelligent network (IN) under overload conditions. The proposed technique considers SCP overload and IN Capability Set (CS)-1 services (such as VOT or MAS service) that have to use the specialized resources of intelligent peripheral (IP). This technique uses first an activating step in which SCP requests service filtering to service switching point (SSP). Then, in the filtering step, SSP sends filtering results to SCP periodically or each N-calls. Also, when filtering time-out expires, SSP stops service filtering, and sends service filtering response to SCP in the deactivating step. This paper applies this technique to VOT/MAS service, and calculates SCP and SSP-IP (circuit) call blocking probabilities by using an analytical VOT/MAS service model. With the modeling and analyzing of this new technique, it shows that this technique reduces the traffic flow into SCP from SSP and IP prominently.

• Journal of Power Electronics
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• v.10 no.4
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• pp.357-364
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• 2010

In this paper, a novel analysis of a carrier based PWM method for multilevel inverters is presented. The space vector PWM and carrier based PWM correlations in multilevel inverters are investigated in a nominal two-level switching diagram. The obtained results can be applied to design various carrier PWM techniques. In this paper, a carrier based single-state PWM technique, which reduces the switching number and optimizes the active voltage errors, is presented. This PWM technique can be advantageous if there are a large number of levels. The proposed method is mathematically formulated and demonstrated by simulations and experimental results.

• Journal of Power Electronics
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• v.13 no.6
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• pp.1016-1023
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• 2013

Predictive current control offers the potential for achieving more precise current control with a minimum of distortion and harmonic noise. However, the predictive method is difficult to implement and has a greater computational burden. This paper introduces a theoretical analysis and experimental verification for an improved predictive current control technique applied to single phase grid connected voltage source inverters (VSI). The proposed technique has simple calculations. An ATmega1280 microcontroller board is used to implement the proposed technique for a simpler and cheaper control system. To enhance the current performance and to obtain a minimum of current THD, an improved tri-level PWM switching strategy is proposed. The proposed switching strategy uses six operation modes instead of four as in the traditional strategy. Simulation results are presented to demonstrate the system performance with the improved switching strategy and its effect on current performance. The presented experimental results verify that the proposed technique can be implemented using fixed point 8-bit microcontroller to obtain excellent results.

• Journal of Power Electronics
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• v.16 no.2
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• pp.498-511
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• 2016

This paper presents a single-phase five-level inverter controlled by two novel pulse width modulation (PWM) switching techniques. The proposed PWM techniques are designed based on minimum switching power loss and minimum total harmonic distortion (THD). In a single-phase five-level inverter employing six switches, the first proposed PWM technique requires four switches to operate at switching frequency and two other switches to operate at line frequency. The second proposed PWM technique requires only two switches to operate at switching frequency and the rest of the switches to operate at line frequency. Compared with conventional PWM techniques for single-phase five-level inverters, the proposed PWM techniques offer high efficiency and low harmonic components in the output voltage. The validity of the proposed PWM switching techniques in controlling single-phase five-level inverters to regulate load voltage is verified experimentally using a 100 V, 500 W laboratory prototype controlled by dspace 1103.

• Journal of Electrical Engineering and Technology
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• v.5 no.3
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• pp.477-483
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• 2010

This paper is studied on a novel buck-boost isolated converter for high efficiency and high power factor. The switching devices in the proposed converter are operated by soft switching technique using a new quasi-resonant circuit, and are driven with discontinuous conduction mode (DCM) according to pulse width modulation (PWM). The quasi-resonant circuit makes use of a step up-down inductor and a loss-less snubber capacitor. The proposed converter with DCM also simplifies the requirement of control circuit and reduces a number of control components. The input ac current waveform in the proposed converter becomes a quasi sinusoidal waveform in proportion to the magnitude of input ac voltage under constant switching frequency. As a result, it is obtained by the proposed converter that the switching power losses are low, the efficiency of the converter is high, and the input power factor is nearly unity. The validity of analytical results is confirmed by some simulation results on computer and experimental results.