• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2005년도 학술대회 논문집
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• pp.387-390
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• 2005

A This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched- capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft-switching commutation. In the first place, the steady-state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment or set-up in laboratory system or this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 B
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• pp.1166-1168
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• 2003

In most power electronic applications, the AC power input provided by the electronic utility needs to first converted to a DC voltage. Such conversion is accomplished by a diode rectifier due to its circuit simplicity and low cost. However, since diode rectifiers have some intrinsic problems such as low power factor and high harmonic distortion, a wide use of such rectifiers may cause noises, malfunction and heat damage in both electrical power systems and electrical machinery systems. This paper proposes soft switched three-phase single switch boost-type converter. The proposed circuit can perform Zero Voltage Switched(ZVS) without using any current and voltage sensors. For this circuit, both simulation and experiments have been performed. The results not only confirmed the ZVS but also indicated that, compared to the conventional hard switched converter, the prosed circuit can improve the efficiency as much as 1.7 to 4.7[%] while keeping the same high power factor and small harmonic distortion in their AC input.

• 전력전자학회논문지
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• 제3권4호
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• pp.426-436
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• 1998

Identification of fault current during the operation of a power semiconductor switch and activation of suitable remedial actions are important for reliable operation of power converters. A short circuit is a basic and severe fault situation in a circuit structure such as voltage source converters. This paper presents a new active protection circuit for fast and precise clamping and safe shutdown of fault currents of the IGBTs. This circuit allows operation of the IGBTs with a higher on-state gate voltage, which can thereby reduce the conduction loss in the device without compromising the short circuit protection characteristics. The operation of the circuit is studied under various conditions, considering variation of temperature, rising rate of fault current, gate voltage value, and protection circuit parameters. An evaluation of the operation of the circuit is made using IGBTs from different to confirm the effectiveness of the protection circuit.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.725-726
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• 2008

This paper deals with characteristic analysis of Linear Switched Reluctance Motor (LSRM) according to switching condition. When approved current in each phase by decided position, we made sure current and voltage according to turn-on, turn-off. In dynamic simulation of LSRM, through an experiment, we decided turn-on position of inductance profile. Also, we presented dynamic characteristic analysis model which is consisted at motor and sensor signal part, etc., and substitute circuit constant that get using magnetic equivalent circuit method, we confirmed current and voltage waveform.

• Journal of Power Electronics
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• 제6권3호
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• pp.253-263
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• 2006

A high performance and low cost single switch current fed energy recovery circuit (ERC) for an alternating current (AC) plasma display panel (PDP) is proposed. Since it is composed of only one power switch compared with the conventional circuit consisting of four power switches and two large energy recovery capacitors, the ERC features a simpler structure and lower cost. Furthermore, since all power switches can be switched under soft switching operating conditions, the proposed circuit has desirable merits such as increased reliability and low switching loss. Specifically, there are no serious voltage notches across the PDP with the aid of gas discharge current compensation, which can greatly reduce the current stress of all inverter switches, and provide those switches with the turn on timing margin. To confirm the validity of proposed circuit, its operation and performance were verified on a prototype for 7-inch test PDP.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1993년도 한국자동제어학술회의논문집(국내학술편); Seoul National University, Seoul; 20-22 Oct. 1993
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• pp.1219-1226
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• 1993

A buck-boost zero current switched(ZCS) series resonant AC to DC converter for the DC output voltage regulation together with high power factor is proposed. The proposed single phase AC to DC converter enables a zero current switching operation of all the power devices allowing the circuit to operate at high swtiching frequencies and high power levels. A dynamic model for this Ac to DC converter is developed and an analysis for the internal operational characteristics is explored. Based on this analysis, a switched discrete sliding mode control(SDSMC) technique is investigated and its advantages over the other types of current control techniques are discussed. With the proposed control technique, the unity power factor without a current overshoot and a wide range of output voltage can be obtained.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 B
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• pp.1029-1031
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• 2001

In this paper, we propose a three-phase soft-switching PWM-PFC converter and describe the circuit operations and the experimental results. The proposed converter is constructed by using a resonant network in parallel with the main switch of the conventional PWM converter. A new PWM-PFC converter achieves including the auxiliary switches without increasing their voltage and current stress.

• Journal of Power Electronics
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• 제9권2호
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• pp.156-163
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• 2009

In this paper a family of zero current transition PWM converters which employs a simple auxiliary circuit is introduced. This soft switched auxiliary circuit is only composed of a switch and a capacitor. The proposed converters are analyzed and various operating modes of the ZCT flyback converter are discussed. Design considerations are presented and the experimental results of the ZCT flyback converter laboratory prototype are illustrated. The experimental results confirm the validity of theoretical analysis.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권8호
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• pp.358-363
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• 2005

This paper presents the reasonable design parameters of a switched reluctance motor to drive a hybrid electric vehicle by using the equivalent magnetic circuit method. The designed motor can be redesigned by using finite element analysis as a variation of the parameter for the purpose of improving performance. This paper shows that a flat-topped current of a phase can be made from a change of the lamination stack length for high average torque and a lower torque ripple. The change of current falling time as a variation of turn-off angle was shown by finite element analysis. The core loss and copper loss were described. The torque of the redesigned motor is suitable for low and high speed ranges to drive a HEV. which is verified by the speed-torque curve.

• 한국통신학회논문지
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• 제21권5호
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• pp.1325-1331
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• 1996

본 논문에서는 전류 스위칭(switched-current:SI) 시스템에서 THD(total harmonic distortion) 증가 원인인 클럭피드스루(clock feedthrough:CFT) 오차 전압을 감소시키는 새로운 전류 메모리(current-memory) 회로를 제안하였다. 제안한 전류 메모리는 CMOS 상보형의 PMOS 트랜지스터를 이용하여 CFT 오차 전압에 의한 출력 왜곡 전류를 감소시킨다. 제안한 전류 메모리 회로를 $1.2{\mu}{\textrm{m}}$ CMOS 공정을 사용하여 설계하고, 입력으로 전류 크기 $68{\mu}{\textrm{m}}$인 1MHz 정현파 신호를 인가하였다.(샘플링 주파수:20MHz) 모의 실험 결과, 기존의 전류 메모리보다 CFT 오차 전압에 의한 출력 왜곡 전류가 10배 정도 감소를 나타내었으며 신호 대 바이어스 전류비가 0.5(peak signal-to-bias current ratio:i/J)인 1KHz 신호를 인가할 경우 THD는 -57dB이다.