• Journal of KIISE:Computer Systems and Theory
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• v.28 no.11
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• pp.601-612
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• 2001

In superscalar processors, value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction in order to exploit instruction level parallelism(ILP). A value predictor looks up the prediction table for the prediction value of an instruction in the instruction fetch stage, and updates with the prediction result and the resolved value after the execution of the instruction for the next prediction. However, as the instruction fetch and issue rates are increased, the same instruction is likely to fetch again before is has been updated in the predictor. Hence, the predictor looks up the stale value in the table and this mostly will cause incorrect value predictions. In this paper, a stride value predictor with the capability of speculative updates, which can update the prediction table speculatively without waiting until the instruction has been completed, is proposed. Also, the performance of the scheme is examined using Simplescalar simulator for SPECint95 benchmarks in which our value predictor is added.

• Journal of the Korea Society of Computer and Information
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• v.29 no.7
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• pp.117-128
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• 2024

In this paper, we propose a process for deriving priority tasks using the legal design technique in a situation where there is high uncertainty in the market and legal system regarding the commercialization of security tokens based on blockchain and distributed ledger technology. To issue and distribute securities tokens, we conducted a legal design workshop with participants who applied for innovative financial services (financial regulatory sandbox). During the workshop, participants harmonized their interests and deliberated on readiness, considering both legal and technical factors. The aim was to ascertain the feasibility of identifying prioritized objectives for future endeavors. The legal design technique facilitates consensus-building among stakeholders in an uncertain environment by confirming and adjusting differing perspectives and disagreements based on mutual understanding. The key stages include the empathetic process called "Family Therapy," the "N whys" for problem definition, and the speculative scenario design for problem-solving. This approach distinguishes itself from user-centered design thinking. Given the diverse stakeholders involved, effective facilitation by the facilitator is crucial during the legal design workshop preparation and execution.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.8
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• pp.741-751
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• 2000

To achieve high performance by exploiting instruction level parallelism aggressively in superscalar processors, it is necessary to overcome the limitation imposed by control dependences and data dependences which prevent instructions from executing parallel. Value prediction is a technique that breaks data dependences by predicting the outcome of an instruction and executes speculatively its data dependent instruction based on the predicted outcome. In this paper, a hybrid value prediction scheme with dynamic classification mechanism is proposed. We design a hybrid predictor by combining the last predictor, a stride predictor and a two-level predictor. The choice of a predictor for each instruction is determined by a dynamic classification mechanism. This makes each predictor utilized more efficiently than the hybrid predictor without dynamic classification mechanism. To show performance improvements of our scheme, we simulate the SPECint95 benchmark set by using execution-driven simulator. The results show that our scheme effect reduce of 45% hardware cost and 16% prediction accuracy improvements comparing with the conventional hybrid prediction scheme and two-level value prediction scheme.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.6
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• pp.306-313
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• 2005

Conditional branch prediction is an important technique for improving processor performance. Branch mispredictions, however, waste a large number of cycles, inhibit out-of-order execution, and waste electric power on mis-speculated instructions. Hence, the branch predictor with higher accuracy is necessary for good processor performance. In global-history-based predictors like gshare and GAg, many mispredictions come from commit update of the history. Some works on this subject have discussed the need for speculative update of the history and recovery mechanisms for branch mispredictions. In this paper, we present a simple mechanism for recovering the branch history after a misprediction. The proposed mechanism adds an age_counter to the original predictor and doubles the size of the branch history register. The age_counter counts the number of outstanding branches and uses it to recover the branch history register. Simulation results on the Simplescalar 3.0/PISA tool set and the SPECINTgS benchmarks show that gshare and GAg with the proposed recovery mechanism improved the average prediction accuracy by 2.14$\%$ and 9.21$\%$, respectively and the average IPC by 8.75$\%$ and 18.08$\%$, respectively over the original predictor.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.6
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• pp.1365-1373
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• 2019

Meltdown and Spectre are vulnerabilities that exploit out-of-order execution and speculative execution techniques to read memory regions that are not accessible with user privileges. OS patches were released to prevent this attack, but older systems without appropriate patches are still vulnerable. Currently, there are some research to detect Meltdown and Spectre attacks, but most of them proposed dynamic analysis methods. Therefore, this paper proposes a binary signature that can be used to detect Meltdown and Spectre malware without executing them. For this, we collected 13 malicious codes from GitHub and performed binary pattern analysis. Based on this, we proposed a static detection method for Meltdown and Spectre malware. Our results showed that the method identified all the 19 attack files with 0.94% false positive rate when applied to 2,317 normal files.

• The Journal of the Convergence on Culture Technology
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• v.8 no.1
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• pp.523-529
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• 2022

Art sponsorship contributed to the development of culture and art by supporting art activities to be financially stable. Various problems in the non-fungible tokens (NFTs) market, such as speculative transactions, are also expected to be improved through sound art sponsorship. This study proposes methods of implementing art sponsorship using NFTs and smart contracts. First, we propose a method of posting the acknowledgement of art sponsorship using NFT metadata. Second, we propose a method to remit sponsorship funds according to the project schedule using time-locked wallets. Third, we propose a method to remit sponsorship funds when major events of the project occur or requirements are met using Event-Driven Execution. The proposed methods can be used to share the fact about art sponsorship and safely fund it. However, many decisions about art projects must be made based on information generated outside the blockchain, which can lead to Oracle problems, so further research is needed.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.67-77
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• 2004

Value prediction is a technique to obtain performance gains by supplying earlier source values of its data dependent instructions using predicted value of a instruction. To fully exploit the potential of value speculation, however, the efficient recovery mechanism is necessary in case of value misprediction. In this paper, we propose a sequential and selective recovery mechanism for value misprediction. It searches data dependency chain of the mispredicted instruction sequentially without pipeline stalls and adverse impact on clock cycle time. In our scheme, only the dependent instructions on the predicted instruction is selectively squashed and reissued in case of value misprediction.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.1
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• pp.99-105
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• 2021

Today, a superscalar processor is the basic unit or an essential component of a multi-core processor, SoCs, and GPUs. Hence, a high-performance out-of-order superscalar processor must be adopted for these systems to maximize its performance. The superscalar processor fetches, issues, executes, and writes back multiple instructions per cycle by utilizing reorder buffers and reservation stations to dynamically schedule instructions in a pipelined scheme. In this paper, a fully pipelined out-of-order superscalar processor with speculative execution is designed with VHDL and verified with GHDL. As a result of the simulation, the program composed of ARM instructions is successfully performed.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.4 s.310
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• pp.1-14
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• 2006

The indirect branch instruction is a most substantial obstacle in utilizing ILP of modem high performance processors. The target address of an indirect branch has the polymorphic characteristic varied dynamically, so it is very difficult to predict the accurate target address. Therefore the performance of a processor with speculative methodology is reduced significantly due to the many execution cycle delays in occurring the misprediction. We proposed the very accurate and novel indirect branch prediction scheme so called data-dependence based prediction. The predictor results in the prediction accuracy of 98.92% using 1K entries, and. 99.95% using 8K But, all of the proposed indirect predictor including our predictor has a large hardware overhead for restoring expected target addresses as well as tags for alleviating an aliasing. Hence, we propose the scheme minimizing the hardware overhead without sacrificing the prediction accuracy. Our experiment results show that the hardware is reduced about 60% without the performance loss, and about 80% sacrificing only the performance loss of 0.1% in aspect of the tag overhead. Also, in aspect of the overhead of storing target addresses, it can save the hardware about 35% without the performance loss, and about 45% sacrificing only the performance loss of 1.11%.

• Spatial Information Research
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• v.21 no.6
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• pp.69-80
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• 2013

Our country has made every efforts to develop Real Estate Transaction culture with emphasis on Licensed Realtors by introducing Real Estate Transaction Law in 1983. Also, MOLIT(Ministry of Land, Infrastructure and Transport) designated several organizations including KAR(Korea Association of Realtors) as Real Estate Transaction Information Network Licensees for data credibility enhancement and transaction transparency. Nevertheless, the level of law abiding spirit and transaction culture are still similar to those of the old 'Bokdeokbang' era. The under-developed transaction behaviors prevent the social capital of people's credibility on Licensed Realtors from advancing, and results in the outcomes of unnecessary social cost. That is, very low credibility on the data on Sales Items in the market and the fear of speculative real estate price uprise and market distortions are continuing on. In this context, the purpose of this study is to propose the model of GIS-based Modernized Real Estate Transaction System and its execution policies to support credible Real Estate Information to the general public for efficient transactions in the market. Accordingly, the study aims at contributing to the modernization of Real Estate Transactions, fostering competitiveness of Realtors in the Real Estate Market.