• Title/Summary/Keyword: Sparkle512

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New Distinguishing Attacks on Sparkle384 Reduced to 6 Rounds and Sparkle512 Reduced to 7 Rounds (6 라운드로 축소된 Sparkle384와 7 라운드로 축소된 Sparkle512에 대한 새로운 구별 공격)

  • Deukjo Hong;Donghoon Chang
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.6
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    • pp.869-879
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    • 2023
  • Sparkle is one of the finalists in the Lightweight Cryptography Standardization Process conducted by NIST. It is a nonlinear permutation and serves as a core component for the authenticated encryption algorithm Schwaemm and the hash function Esch. In this paper, we provide specific forms of input and output differences for 6 rounds of Sparkle384 and 7 rounds of Sparkle512, and make formulas for the complexity of finding input pairs that satisfy these differentials. Due to the significantly lower complexity compared to similar tasks for random permutations with the same input and output sizes, they can be valid distinguishing attacks. The numbers(6 and 7) of attacked rounds are very close to the minimum numbers(7 and 8) of really used rounds.

Efficient Implementation of NIST LWC SPARKLE on 64-Bit ARMv8 (ARMv8 환경에서 NIST LWC SPARKLE 효율적 구현)

  • Hanbeom Shin;Gyusang Kim;Myeonghoon Lee;Insung Kim;Sunyeop Kim;Donggeun Kwon;Seonggyeom Kim;Seogchung Seo;Seokhie Hong
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.33 no.3
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    • pp.401-410
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    • 2023
  • In this paper, we propose optimization methods for implementing SPARKLE, one of the NIST LWC finalists, on a 64-bit ARMv8 processor. The proposed methods consist of two approaches: an implementation using ARM A64 instructions and another using NEON ASIMD instructions. The A64-based implementation is optimized by performing register scheduling to efficiently utilize the available registers on the ARMv8 architecture. By utilizing the optimized A64-based implementation, we can achieve speeds that are 1.69 to 1.81 times faster than the C reference implementation on a Raspberry Pi 4B. The ASIMD-based implementation, on the other hand, optimizes data by parallelizing the ARX-boxes to perform more than three of them concurrently through a single vector instruction. While the general speed of the optimized ASIMD-based implementation is lower than that of the A64-based implementation, it only slows down by 1.2 times compared to the 2.1 times slowdown observed in the A64-based implementation as the block size increases from SPARKLE256 to SPARKLE512. This is an advantage of the ASIMD-based implementation. Therefore, the ASIMD-based implementation is more efficient for SPARKLE variant block cipher or permutation designs with larger block sizes than the original SPARKLE, making it a useful resource.