• Proceedings of the KIEE Conference
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• 2001.07a
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• pp.330-332
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• 2001

This paper reviews technology for power quality differentiated supply in power system. Since price and power quality has been single goods in the light of customer-side view point but hereafter it is essential for power market to introduce multiple goods which is composed of differentiated combination between them. This paper should like to work out strategy for power quality differentiated supply in domestic power system by comparison characteristics of differentiated background and its relevant various theory.

• Journal of the Korean Operations Research and Management Science Society
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• v.25 no.2
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• pp.11-22
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• 2000

The unit of competition is not a single firm any more but group of firms. They make a supply chain and compete with other chains. In this study we investigate success factors of supply chains from the supplying firms perspective. We consider various success factors such as commitmet trust communication confilct re-solving techniques vendor selection process and incentive systems. A set of hypotheses is tested based on the data collected from the electronics and automobile part manufacturers. Samples are divided by the length of the relationship between the vendor and assembler. joint problem solving under the long-term relationship plays an important role for the success of the supply chain. The findings offer insight into how to better manage the sup-ply chains.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.11
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• pp.655-662
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• 1999

This paper describes controller design and simulation-model development of a dynamic voltage compensator using series and shunt inverters. The control system was designed using PI controller and vector relationship between the supply voltage and load voltage. A simulation model with EMTP was developed to analyze performance of the controller and the whole system. The simulation and experiment results confirm that the dynamic compensator can restore the load voltage under the fault of the distribution system, such as single-line-ground fault, three-line-to-ground fault, and line-to-line fault.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.12
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• pp.20-27
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• 1997

In this paper, a multiplying digital-to-analog converter (MDAC) circuit for low-power high-resolution CMOS algorithmic A/D converters (ADC's) is proposed. The proposed MDAC is designed to operte properly at a supply at a supply voltge between 3 V and 5 V and employs an analog0domain power reduction technique based on a bias switching circuit so that the total power consumption can be optimized. As metal-to-metal capacitors are implemented as frequency compensation capacitors, opamps' performance can be varied by imperfect process control. The MDAC minimizes the effects by the circuit performance variations with on-chip tuning circuits. The proposed low-power MDAC is implementd as a sub-block of a 10-bit 200kHz algorithmic ADC using a 0.6 um single-poly double-metal n-well CMOS technology. With the power-reduction technique enabled, the power consumption of the experimental ADC is reduced from 11mW to 7mW at a 3.3V supply voltage and the power reduction ratio of 36% is achieved.

• Journal of Korean Institute of Industrial Engineers
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• v.16 no.1
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• pp.51-58
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• 1990

A deterministic capacity expansion planning model for a two-capacity type facility is analyzed to determine the sizes to be expanded in each period so as to supply the known demands for two distinct capacity type(product) on time and to minimize the total cost incurred over a finite planning horizon of T periods. The model assumes that capacity unit of the facility simultaneously serves a prespecified number of demand units of each capacity type, that capacity type 1 can be used to supply demands for capacity type 2, but that capacity type 2 can't be used to supply demands for capacity type 1. Capacity expansion and excess capacity holding cost functions considered are nondecreasing and concave. The structure of an optimal solution is characterized and then used in developing an efficient dynamic programming algorithm that finds optimal capacity planning policy.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.6
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• pp.397-403
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• 2021

In this paper, phase shedding algorithm that measuring to converter's input and output parameter during real-time to control the number of driving converters is proposed. The proposed phase-shedding algorithm drives the DVR power supply with the optimal converter's combination without the loss calculation curve and the lookup table in which the efficiency is measured in advance. The proposed algorithm was implemented through a digital controller and verified in a two-modular LLC converter with a single rated power of 60 Win a 120 W DVR power supply system. Experimental results are presented to prove the validity of the proposed algorithm.

• Journal of Korean Tunnelling and Underground Space Association
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• v.10 no.2
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• pp.167-175
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• 2008

The construction cost for the single shell tunnel is cheaper than that of the double shell tunnel according to the case studies performed in several domestic and foreign tunnels. However, the economic advantage of single shell tunnel drops drastically as the condition of the rock mass deteriorates. Therefore, the single shell tunnelling method should be applied to the good rock mass conditions. The application of the single shell tunnelling method to tunnels in Korea should be determined considering the ratio between the good rock and poor rock masses along the tunnel section. The use of the single shell tunnel is expected to offend depending on the cheap supply of high quality shotcrets and rock bolts developed for single shell tunnels.

• Proceedings of the KSR Conference
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• 2011.10a
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• pp.2317-2322
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• 2011

In three-phase power, when the power is supplied to the single phase load, there is the unbalance of load in the three-phase power. So the scott transformer is used in the power system to supply a single phase load in three-phase power without the unbalance of loads. Especially, the scott transformer is used in the AC substation of electric railroad. Two single phase transformers are combined by T-wiring in the scott transformer. So, two single phase voltage is provided by differing $90^{\circ}$ phase in three-phase power. The selection of related equipment and correction of protective relay are not easy from characteristic of the scott transformer when shunt and ground faults occur. In this paper, electric model of the scott transformer is suggested and the current of the scott transformer in shunt and ground faults is analyzed. Also, the scott transformer model is demonstrated by using Sinulink.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.8
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• pp.392-401
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• 2001

This paper presents the single-stage high power factor AC to DC converter operated in active-clamp mode. The proposed converter is added active-clamping circuit to boost-flyback single-stage power factor corrected power supply. The active-clamping circuit limits voltage spikes, recycles the energy trapped in the leakage inductance, and provides a mechanism for achieving soft switching of the electronic switches to reduce the switching loss. The auxiliary switch of active-clamping circuit uses the same control and driver circuit as the main switch to reduce the additional cost and size. To verify the performance of the proposed converter, a 100W converter has been designed. The proposed converter gives good power factor correction, low line current harmonic distortions, and tight output voltage regulation, as used unity power factor.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.2
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• pp.246-251
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• 2014

In this paper, a high-speed CMOS Image Sensor (CIS) based on a 10-bit two step Single Slope A/D Converter (SS-ADC) is proposed. The A/D converter is composed of both 5-bit coarse ADC and a 6-bit fine ADC, and the conversion speed is 10 times faster than that of the single-slope A/D convertor. In order to reduce the pixel noise, further, a Hybrid Correlated Double Sampling (H-CDS) is also discussed. The proposed A/D converter has been fabricated with 0.13um 1-poly 4-metal CIS process, and it has a QVGA ($320{\times}240$) resolution. The fabricated chip size is $5mm{\times}3mm$, and the power consumption is about 35 mW at 3.3 V supply voltage. The measured conversion speed is 10 us, and the frame rate is 220 frames/s.