• Journal of the Korean Solar Energy Society
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• v.28 no.5
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• pp.1-7
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• 2008

Flashed steam system is one of the important geothermal power production methods. In this paper, optimum operations and performances of single and double flash systems are presented. It is shown that double flash system can produce about 26.5% more power than single flash system. Temperature of geothermal water($T_R$) is the most important parameter in the geothermal system. Optimum single and double flash temperatures and net power produced with these optimum conditions are expressed as a function of $T_R$ in this study. Thus net power output from geothermal resources can be estimated with the results of this work. Condenser Temperature($T_{con}$) is also important and the net power production can be shown as a function of ($T_R-T_{con}$. Volume flow rate per unit power is also to be considered as the condenser temperature decreases.

• Speech Sciences
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• v.14 no.4
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• pp.157-167
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• 2007

In this paper, we implemented a single-chip speech recognizer using the TMS320C2000 DSPs. For this implementation, we had developed very small-sized speaker-dependent recognition engine based on dynamic time warping, which is especially suited for embedded systems where the system resources are severely limited. We carried out some optimizations including speed optimization by programming time-critical functions in assembly language, and code size optimization and effective memory allocation. For the TMS320F2801 DSP which has 12Kbyte SRAM and 32Kbyte flash ROM, the recognizer developed can recognize 10 commands. For the TMS320F2808 DSP which has 36Kbyte SRAM and 128Kbyte flash ROM, it has additional capability of outputting the speech sound corresponding to the recognition result. The speech sounds for response, which are captured when the user trains commands, are encoded using ADPCM and saved on flash ROM. The single-chip recognizer needs few parts except for a DSP itself and an OP amp for amplifying microphone output and anti-aliasing. Therefore, this recognizer may play a similar role to dedicated speech recognition chips.

• Proceedings of the KOSOMBE Conference
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• v.1997 no.05
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• pp.330-333
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• 1997

In this paper, we designed a low power and small-sized, light weighted intelligent ambulatory monitoring system using a flash memory card. The system's hardware specifications are as follows: 2 channels, 8bit/250Hz sampling rate, 20M byte storage capacity, a single-chip microcontroller (68HC11E9). To easily interface with PC based system, FFS(Flash File System) was used. We obtained the QRS detection rate of 99.14 through the evaluation with MIT/BIH database.

• Nuclear Engineering and Technology
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• v.54 no.5
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• pp.1851-1859
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• 2022

Experimental research on flow characteristics of open natural circulation system was performed, to figure out the mechanism of the open natural circulation behaviors. The influence factors, such as the heating power, the inlet subcooled and the level of cooling tank on the flow characteristics of the system were examined. It was shown that within the scope of the experimental conditions, there are five flow types: single-phase stable flow, flash and geyser coexisting unstable flow, flash stable flow, flash unstable flow, and flash and boiling coexisting unstable flow. The geyser flow in flash and geyser coexisting unstable flow is different from classic geysers flow. The flow oscillation period and amplitude of the former are more regular, is a newly discovered flow pattern. By drawing the flow instability boundary diagram and sorting out the flow types, it is found that the two-phase unstable flow is mainly characterized by boiling and flash, which determine the behavior of open natural circulation respectively or jointly. Moreover, compared with full liquid level system, non-full liquid level system is more prone to boiling phenomenon, and the range of heat flux density and undercooling degree corresponding to unstable flow is larger.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.4
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• pp.26-33
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• 2012

As the flash memory has increased the market share of data storage in imbedded system and occupied the most of area in a system, It has a profound impact on system reliability. Flash memory is divided NOR/NAND-type according to the cell array structure, and is classified as SLC(Single Level Cell)/MLC(Multi Level Cell) according to reference voltage. Although NAND-type flash memory is slower than NOR-type, but it has large capacity and low cost. Also, By the effect of demanding mobile market, MLC NAND-type is widely adopted for the purpose of the multimedia data storage. Accordingly, Importance of fault detection algorithm is increasing to ensure MLC NAND-type flash memory reliability. There are many researches about the testing algorithm used from traditional RAM to SLC flash memory and it detected a lot of errors. But the case of MLC flash memory, testing for fault detection, there was not much attempt. So, In this paper, Extend SLC NAND-type flash memory fault detection algorithm for testing MLC NAND-type flash memory and try to reduce these differences.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.61-71
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• 2014

As the occupancy rate of the flash memory increases in the storage media market for the embedded system and the semi-conductor industry grows, the demand and supply of flash memory is increasing by a big margin. They are especially used in large quantity in the smart phones, tablets, PC, SSD and Soc(System on Chip) etc. The flash memory is divided into the NOR type and NAND type according to the cell arrangement structure and the NAND type is divided into the SLC(Single Level Cell) and MLC(Multi Level Cell) according to the number of bits that can be stored in each cell. Many tests have been performed on NOR type such as BIST(Bulit-In Self Test) and BIRA(Bulit-In Redundancy Analysis) etc, but there is little study on the NAND type. For the case of the existing BIST, the test can be proceeded using external equipments like ATE of high price. However, this paper is an attempt for the improvement of credibility and harvest rate of the system by proposing the BIST for the MLC NAND type flash memory of Finite State Machine structure on which the pattern test can be performed without external equipment since the necessary patterns are embedded in the interior and which uses the MLC NAND March(x) algorithm and pattern which had been proposed for the MLC NAND type flash memory.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.12
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• pp.1199-1203
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• 2010

Data transfer between host system and storage device is based on the data unit called sector, which can be varied depending on computer systems. If NAND flash memory is used as a storage device, the variant sector size can affect storage system performance since its operation is much related to sector size and page size. In this paper, we propose an efficient FTL mapping management scheme to support multiple sector size within one NAND flash memory based storage device, and analyze the performance effect and management overhead. According to the proposed scheme, the management overhead of proposed FTL management is lower than conventional scheme when various sector sizes are configured in computer systems, while performance is less degraded in comparison with single sector size support system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.706-711
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• 2014

A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

• Proceedings of the KSME Conference
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• 2001.11b
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• pp.952-957
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• 2001

The objectives of this investigation were to obtain an excellent spray by cavitation under the low injection pressure. When cavitation occurs in the nozzle hole, the atomization of the liquid jet enhanced considerably. In this experiments, a acrylic nozzle made the gap and installed the bypass in the nozzle hole was used to enhance the atomization of the liquid jet at the low injection pressure. The liquid flow in the nozzle hole was photographed by a transmitted light using a micro flash. The spray angle was measured macroscope images of PMAS and the Sauter mean diameter was measured PDA system. To measure the pressure of the nozzle hole, pressure transducer was used. The results of this study indicated that enhanced atomization of the liquid jet at the low injection pressure was obtained by making the gap and installing the bypass at the single hole nozzle.

• Journal of ILASS-Korea
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• v.7 no.1
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• pp.36-42
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• 2002

The objective of this investigation was to obtain an excellent spray at the low injection pressure. When cavitation occurred in the nozzle hole the atomization of the liquid jet enhanced considerably. In this experiments, a acrylic nozzle which was installed the gap and installed the bypass in the nozzle hole was used to enhance the atomization of the liquid jet at the few injection pressure. The liquid flow in the nozzle hole was photographed by a transmitted light using a micro flash. The spray angle was measured by macroscope images of PMAS and the Sauter mean diameter was measured by PDA system. The pressure of the notate hole was measured by pressure transducer. It was found that enhanced atomization of the liquid jet at the low injection pressure was obtained by installing the gap and the bypass at the single hole nozzle.