• Title/Summary/Keyword: Silicon wafer

Search Result 1,109, Processing Time 0.033 seconds

Light Scattering Characteristics of Defects on Silicon Wafer Surface (실리콘 웨이퍼 미세 표면결함의 광산란 특성 평가)

  • Ha T.H.;Song J.Y.;Miyoshi Takashi;Takaya Yasuhiro
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2005.06a
    • /
    • pp.1083-1086
    • /
    • 2005
  • Light scattering measurement system that can evaluate light scattering characteristic from defects on silicon wafer surface has been developed. The system uses $Ar^+$ laser as an illumination source, and a highly sensitive photomultiplier tube (PMT) for detecting scattered light from defects. Unlike with conventional measurement system, our system has ability to measure scattered light pattern from wide range of scattering angles with changeable incidence condition. It is shown that our developed system is effective to discriminate the types and sizes of defects from basic experimental results using a microscatch and a PSL sphere.

  • PDF

미끄럼운동 시 TiN코팅에 형성되는 산화막이 마찰 및 마멸 특성에 미치는 영향

  • Jo, Jeong-U;Im, Jeong-Sun;U, Sang-Gyu;Lee, Yeong-Je
    • Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
    • /
    • 2002.05a
    • /
    • pp.310-316
    • /
    • 2002
  • In this study, the effects of oxide layer formed on the wear tracks of TiN coated silicon wafer on friction and wear characteristics were investigated. Silicon wafer was used for the substrate of coated disk specimens, which were prepared by depositing TiN coating with $1{\mu}m$ in coating thickness. AISI 52100 steel ball was used for the counterpart. The tests were performed both in air for forming oxide layer on the wear track and in nitrogen to avoid oxidation. This paper reports characterization of the oxide layer effects on friction and wear characteristics using X-ray diffraction (XRD). Auger electron spectroscopy (AES), scanning electron microscopy (SEM) and sliding tests.

  • PDF

The Effect of Hydrogen Plasma on Surface Roughness and Activation in SOI Wafer Fabrication

  • Park, Woo-Beom;Kang, Ho-Cheol;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
    • /
    • v.1 no.1
    • /
    • pp.6-11
    • /
    • 2000
  • The hydrogen plasma treatment of silicon wafers in the reactive ion-etching mode was studied for the application to silicon-on-insulator wafers which were prepared using the wafer bonding technique. The chemical reactions of hydrogen plasma with surface were used for both surface activation and removal of surface contaminants. As a result of exposure of silicon wafers to the plasma, an active oxide layer was found on the surface. This layer was rendered hydrophilic. The surface roughness and morphology were examined as functions of the plasma exposing time and power. In addition, the surface became smoother with the shorter plasma exposing time and power. The value of initial surface energy estimated by the crack propagation method was 506 mJ/㎡, which was up to about three times higher as compared to the case of conventional direct using the wet RCA cleaning method.

  • PDF

A Study on Classification of Micro-Cracks in Silicon Wafer Through the Fusion of Principal Component Analysis and Neural Network (주성분분석과 신경회로망의 융합을 통한 실리콘 웨이퍼의 마이크로 크랙 분류에 관한 연구)

  • Seo, Hyoung Jun;Kim, Gyung Bum
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.32 no.5
    • /
    • pp.463-470
    • /
    • 2015
  • Solar cell is typical representative of renewable green energy. Silicon wafer contributes about 66 percent to its cost structure. In its manufacturing, micro-cracks are often occurred due to manufacturing process such as wire sawing, grinding and cleaning. Their detection and classification are important to process feedback information. In this paper, a classification method of micro-cracks is proposed, based on the fusion of principal component analysis(PCA) and neural network. The proposed method shows that it gives higher results than single application of two methods, in terms of shape and size classification of micro-cracks.

Si Micromachining for MEMS-lR Sensor Application (결정의존성 식각/기판접합을 이용한 MEMS용 구조물의 제작)

  • 박흥우;주병권;박윤권;박정호;김철주;염상섭;서상의;오명환
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 1998.06a
    • /
    • pp.411-414
    • /
    • 1998
  • In this paper, the silicon-nitride membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PT layer as a IR detection layer was deposited on the membrane and its characteristics were measured. The attack of PT layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer can be solved through the method of bonding/etching of silicon wafer. Because the PT layer of c-axial orientation rained thermal polarization without polling, the more integration capability can be achieved. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by IR detector, and the bonding interface was observed by SEM. The polarization characteristics and the dielectric characteristics of the PT layer were measured, too.

  • PDF

Si Micromachining for MEMS-IR Sensor Application (결정의존성 식각/기판접합을 이용한 MEMS용 구조물의 제작)

  • 박홍우;주병권;박윤권;박정호;김철주;염상섭;서상회;오명환
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.11 no.10
    • /
    • pp.815-819
    • /
    • 1998
  • The silicon-nirtide membrane structure for IR sensor was fabricated through the etching and the direct bonding. The PRO($PbTiO_3$ ) layer for a IR detection was coated on the membrane and its characteristics were measured. The a attack of PTO layer during the etching of silicon wafer as well as the thermal isolation of the IR detection layer were eliminated through the method of bonding/etching of silicon wafer. The surface roughness of the membrane was measured by AFM, the micro voids and the non-contacted area were inspected by the PTO layer were measured, too.

  • PDF

Relationships between Carrier Lifetime and Surface Roughness in Silicon Wafer by Mechanical Damage (기계적 손상에 의한 실리콘 웨이퍼의 반송자 수명과 표면 거칠기와의 관계)

  • 최치영;조상희
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.12 no.1
    • /
    • pp.27-34
    • /
    • 1999
  • We investigated the effect of mechanical back side damage in viewpoint of electrical and surface morphological characteristics in Czochralski silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductance decay technique, atomic force microscope, optical microscope, wet oxidation/preferential etching methods. The data indicate that the higher the mechanical damage degree, the lower the minority carrier lifetime, and surface roughness, damage depth and density of oxidation induced stacking fault increased proportionally.

  • PDF

Removal of small particles from silicon wafers using laser-induced shock waves (레이저 유기 충격파를 이용한 웨이퍼 표면 미소입자 제거)

  • 이종명;조성호
    • Laser Solutions
    • /
    • v.5 no.2
    • /
    • pp.9-15
    • /
    • 2002
  • Basic principles and unique characteristics of laser-induced shock cleaning have been described compared to a conventional laser cleaning method and the removal of small tungsten particles from silicon wafer surfaces was attempted using both methods. It was found that the conventional laser cleaning was not feasible to remove the tungsten particles whereas a successful removal of the particles was carried out by the laser-induced shock waves. From the quantitative analysis using a surface scanner, the average removal efficiency of the particles was more than 98% where smaller particles were slightly more difficult to remove probably due to the increased adhesion force with a decrease of the particle size. It was also seen that the gap distance between the laser focus and the wafer surface is an important processing parameter since the removal efficiency is strongly dependent on the gap distance.

  • PDF

Silicon On Insulator (SOI) Wafer Development using Plasma Source Ion Implantation (PSII) Technology (플라즈마 이온주입 기술을 이용한 SOI 웨이퍼 제조)

  • Jung, Seung-Jin;Lee, Sung-Bae;Han, Seung-Hee;Lim, Sang-Ho
    • Korean Journal of Metals and Materials
    • /
    • v.46 no.1
    • /
    • pp.39-43
    • /
    • 2008
  • PSII (Plasma Source Ion Implantation) using high density pulsed ICP source was employed to implant oxygen ions in Si wafer. The PSII technique can achieve a nominal oxygen dose of $3 {\times}10^{17}atoms/cm^2$ in implantation time of about 20min. In order to prevent oxidation of SOI layer during high temperature annealing, the wafer was capped with $2,000{\AA}$ $Si_3N_4 $ by PECVD. Cross-sectional TEM showed that continuous $500{\AA}$ thick buried oxide layer was formed with $300{\AA}$ thick top silicon layer in the sample. This study showed the possibility of SOI fabrication using the plasma source ion implantation with pulsed ICP source.

Bow Reduction in Thin Crystalline Silicon Solar Cell with Control of Rear Aluminum Layer Thickness (박형 결정질 실리콘 태양전지에서의 휨현상 감소를 위한 알루미늄층 두께 조절)

  • Baek, Tae-Hyeon;Hong, Ji-Hwa;Lim, Kee-Joe;Kang, Gi-Hwan;Yu, Gwon-Jong;Song, Hee-Eun
    • 한국태양에너지학회:학술대회논문집
    • /
    • 2012.03a
    • /
    • pp.108-112
    • /
    • 2012
  • Crystalline silicon solar cell remains the major player in the photovoltaic marketplace with 90 % of the market, despite the development of a variety of thin film technologies. Silicon's excellent efficiency, stability, material abundance and low toxicity have helped to maintain its position of dominance. However, the cost of silicon photovoltaic remains a major barrier to reducing the cost of silicon photovoltaics. Using the crystalline silicon wafer with thinner thickness is the promising way for cost and material reduction in the solar cell production. However, the thinner thickness of silicon wafer is, the worse bow phenomenon is induced. The bow phenomenon is observed when two or more layers of materials of different temperature expansion coefficiencies are in contact, in this case silicon and aluminum. In this paper, the solar cells were fabricated with different thicknesses of Al layer in order to reduce the bow phenomenon. With lower paste applications, we observed that the bow could be reduced by up to 40% of the largest value with 130 micron thickness of the wafer even though the conversion efficiency decrease of 0.5 % occurred. Since the bowed wafers lead to unacceptable yield losses during the module construction, the reduction of bow is indispensable on thin crystalline silicon solar cell. In this work, we have studied on the counterbalance between the bow and conversion efficiency and also suggest the formation of enough back surface field (BSF) with thinner Al paste application.

  • PDF