• Korean Journal of Metals and Materials
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• v.49 no.11
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• pp.905-909
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• 2011

The formation of front metal contact silicon solar cells is required for low cost, low contact resistance to silicon surfaces. One of the available front metal contacts is Ni/Cu plating, which can be mass produced via asimple and inexpensive process. A selective emitter, meanwhile, involves two different doping levels, with higher doping (${\leq}30{\Omega}/sq$) underneath the grid to achieve good ohmic contact and low doping between the grid in order to minimize the heavy doping effect in the emitter. This study describes the formation of a selective emitter and a nickel silicide seed layer for the front metallization of silicon cells. The contacts were thickened by a plated Ni/Cu two-step metallization process on front contacts. The experimental results showed that the Ni layer via SEM (Scanning Electron Microscopy) and EDX (Energy dispersive X-ray spectroscopy) analyses. Finally, a plated Ni/Cu contact solar cell displayed efficiency of 18.10% on a $2{\times}2cm^2$, Cz wafer.

• Current Photovoltaic Research
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• v.12 no.1
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• pp.6-16
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• 2024

The efficiency of silicon solar cells is approaching a theoretical limit referred to as 'the state of the art'. Consequently, maintaining efficiency is more productive than pursuing improvements the last room for limiting efficiency. One of the primary considerations in silicon module conservation is the occurrence of failures and degradation. Degradation can be mitigated during the cell manufacturing stage, unlike physical and spontaneous failure. It is mostly because the chemical reaction is triggered by the carrier generation of thermal and light injection, an inherent aspect of the solar cell environment. Therefore, numerous researchers and cell manufacturers are engaged in implementing mitigation strategies based on the physical degradation mechanism.

• 한국신재생에너지학회:학술대회논문집
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• 2008.05a
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• pp.378-381
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• 2008

고효율 a-Si:H/c-Si 이종접합 태양전지를 얻기 위해서는 우수한 c-Si wafer 위에 고품질의 비정질 실리콘박막을 통한 heterointerface를 형성하는 것이 매우 중요하다. 이를 달성하기 위해서는 공정중에 오염되기 쉬운 Si wafer 표면 상태를 정확히 검사하고 잘 관리하여야 한다. 본 연구에서는 세정 및 표면산화에 따른 Si wafer 상태를 Spectroscopic Ellipsometry 및 u-PCD를 이용하여 분석하였으며, <$\varepsilon$2> @4.25eV 값이 Si wafer 상태를 잘 나타내고 있음을 확인하였고 세정 최적화 할 경우 그 값이 43.02에 도달하였다. 또한 RF-PECVD로 증착된a-Si:H 박막을 EMA 모델링을 통해 분석한 결과 낮은 결정성과 높은 밀도를 가지는 a-Si:H를 얻을 수 있었으며, 이를 이종접합 태양전지에 적용한 결과 Flat wafer상에서 10.88%, textured wafer 적용하여 13.23%의 변환효율을 얻었다. 결론적으로 Spectroscopic Ellipsometry가 매우 얇고 고품질의 다층 박막이 필요한 이종접합 태양전지 분석에 있어 매우 유용한 방법임이 확인되었다.

• Journal of the Korean Vacuum Society
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• v.19 no.2
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• pp.114-120
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• 2010

Conventional surface texturing in crystalline silicon solar cell have been use wet texturing by Alkali or Acid solution. But conventional wet texturing has the serious issue of wafer breakage by large consumption of wafer in wet solution and can not obtain the reflectance below 10% in multi crystalline silicon. Therefore it is focusing on RIE texturing, one method of dry etching. We developed large scale plasma RIE (Reactive Ion Etching) equipment which can accommodate 144 wafers (125 mm) in tray in order to provide surface texturing on the silicon wafer surface. Reflectance was controllable from 3% to 20% in crystalline silicon depending on the texture shape and height. We have achieved excellent reflectance below 4% on the weighted average (300~1,100 nm) in multi crystalline silicon using plasma texturing with gas mixture ratio such as $SF_6$, $Cl_2$, and $O_2$. The texture shape and height on the silicon wafer surface have an effect on gas chemistry, etching time, RF frequency, and so on. Excellent conversion efficiency of 16.1% is obtained in multi crystalline silicon by RIE process. In order to know the influence of RF frequency with 2 MHz and 13.56 MHz, texturing shape and conversion efficiency are compared and discussed mutually using RIE technology.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.43-49
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• 2013

We have studied on ozonate water cleaning mechanisms to apply in manufacturing process of 156 mm silicon wafer which is used in the solar cell fabrication. We have analyzed contamination sources on wafer surface which causes poor quality and performance of products in fabrication process, and examined cleaning process using ozonate water to eliminate it. Using this novel technology particles are removed over 94%, and remained organic materials are removed more over 45%.

• 한국신재생에너지학회:학술대회논문집
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• 2009.06a
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• pp.77-79
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• 2009

Amorphous/crystalline silicon heterojunction solar cells, TCO/a-Si:H (p)/c-Si(n)/a-Si:H(n)/Al, are investigated. The influence of various parameters for the front structures was studied. We used thin (10 nm) a-Si:H(p) layers of amorphous hydrogenated silicon are deposited on top of a thick ($500{\mu}m$) crystalline c-Si wafer. This work deals with the influence of the a-Si:H(p) doping concentration on the solar cell performance is studied.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.10
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• pp.754-759
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• 2013

Aluminum oxide($Al_2O_3$) film deposited by atomic layer deposition (ALD) is known to supply excellent surface passivation properties on crystalline Si surfaces. Since $Al_2O_3$ has fixed negative charge, it forms effective surface passivation by field effect passivation on the rear side in p-type silicon solar cell. However, $Al_2O_3$ layer formed by ALD process needs very long process time, which is not applicable in mass production of silicon solar cells. In this paper, plasma-assisted ALD(PA-ALD) was applied to form $Al_2O_3$ to reduce the process time. $Al_2O_3$ synthesized by ALD on c-Si (100) wafers contains a very thin interfacial $SiO_2$ layer, which was confirmed by FTIR and TEM. To improve passivation quality of $Al_2O_3$ layer, the deposition temperature was changed in range of $150{\sim}350^{\circ}C$, then the annealing temperature and time were varied. As a result, the silicon wafer with aluminum oxide film formed in $250^{\circ}C$, $400^{\circ}C$ and 10 min for the deposition temperature, the annealing temperature and time, respectively, showed the best lifetime of 1.6ms. We also observed blistering with nanometer size during firing of $Al_2O_3$ deposited on p-type silicon.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.12
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• pp.1015-1020
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• 2012

Resistance of the front electrode is the highest proportion of the ingredients of the series resistance in crystalline silicon solar cell. While resistance of the front electrode is decreased with larger area, it induces the optical loss, causing the conversion efficiency drop. Therefore the front electrode with high aspect ratio increasing its height and decreasing is necessary for high-efficiency solar cell in considering shadowing loss and resistance of front electrode. In this paper, we used the screen printing method to form high aspect ratio electrode by multiple printing. Screen printing is the straightforward technology to establish the electrodes in silicon solar cell fabrication. The several printed front electrodes with Ag paste on silicon wafer showed the significantly increased height and slightly widen finger. As a result, the resistance of the front electrode was decreased with multiple printing even if it slightly increased the shadowing loss. We showed the improved electrical characteristics for c-Si solar cell with repeatedly printed front electrode by 0.5%. It lays a foundation for high efficiency solar cell with high aspect ratio electrode using screen printing.

• Current Photovoltaic Research
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• v.6 no.4
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• pp.109-118
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• 2018

Silicon (Si) solar cells are the most successful technology which are ruling the present photovoltaic (PV) market. In that essence, multijunction (MJ) solar cells provided a new path to improve the state-of-art efficiencies. There are so many hurdles to grow the MJ III-V materials on Si substrate as Si with other materials often demands similar qualities, so it is needed to realize the prospective of Si tandem solar cells. However, Si tandem solar cells with MJ III-V materials have shown the maximum efficiency of 30 %. This work reviews the development of the III-V/Si solar cells with the synopsis of various growth mechanisms i.e hetero-epitaxy, wafer bonding and mechanical stacking of III-V materials on Si substrate. Theoretical approaches to design efficient tandem cell with an analysis of state-of-art silicon solar cells, sensitivity, difficulties and their probable solutions are discussed in this work. An analytical model which yields the practical efficiency values to design the high efficiency III-V/Si solar cells is described briefly.

• Current Photovoltaic Research
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• v.5 no.2
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• pp.59-62
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• 2017

Surface texturing is affected the uniformity and size of pyramid with saw mark defect density. To analysis the influence of the saw mark defect density, we textured various si wafer. When the texturing process proceeds without the saw mark removal, silicon wafer of low-saw mark defect density showed small pyramid size of $3.5{\mu}m$ with the lowest average value of the reflectance of 10.6%. When texturing carried out after removal of the saw mark using the TMAH solution, we obtained a reflectance of about 11% and the large pyramid size of $5{\mu}m$. As a result, saw mark wafers showed a better pyramid structure than saw mark-free wafer. This result showed that saw mark can take place more smooth etching by the KOH solution and saw mark-free wafer is determined to be a factor that have a higher reflectance and a large pyramid.