• Korean Journal of Materials Research
• /
• v.15 no.5
• /
• pp.313-317
• /
• 2005

The relation between bulk microdefect (BMD) and mechanical strength of $P/P^-$ epitaxial silicon wafers (Epitaxial wafer) as a function of nitrogen concentrations was studied. After 2 step anneal$(800^{\circ}C/4hrs+1000^{\circ}C/16hrs)$, BMD was not observed in nitrogen undoped epitaxial silicon wafer while BMD existed and increased up to $3.83\times10^5\;ea/cm^2$ by addition of $1.04\times10^{14}\;atoms/cm^3$ nitrogen doping. The slip occurred for nitrogen undoped and low level nitrogen doped epitaxial wafers. However, there was no slip occurrence above $7.37\times10^{13}\;atoms/cm^3$ nitrogen doped epitaxial wafer. Mechanical strength was improved from 40 to 57 MPa as nitrogen concentrations were increased. Therefore, the nitrogen doping in silicon wafer plays an important role to improve BMD density, slip occurrence and mechanical strength of the epitaxial silicon wafers.

• Journal of the Korean institute of surface engineering
• /
• v.28 no.1
• /
• pp.55-63
• /
• 1995

Alkaline solutions such as $NH_4$OH, choline and TMAH (($CH_3$)$_4$NOH) have been introduced in semiconductor wet processing of silicon wafers to control ionic and particulate impurities following etching in acidic solutions. These chemicals usually mixed with hydrogen peroxide and/or surfactants to control the etch rate of silicon. The highest etch rate was observed in $NH_4$OH solutions at a pH in alkaline solutions. It indicates that the etch rate depends on the content of $OH^{-}$ as well as cations of alkaline solutions. STM/AFM techniques were used to characterize the effect of alkaline solutions on silicon surface roughness. In SC1 (mixture of $NH_4$OH : $H_2$$O_2$ : $H_2$O) solutions, the reduction of the ammonium hydroxide proportion from 1 to 0.1 decreased the surface roughness ($R_{rms}$) from 6.4 to $0.8\AA$. The addition of $H_2$$O_2$ and surfactants to choline and TMAH reduced the values of $R_{p-v}$ and $R_{rms}$ significantly. $H_2$$_O2$ and surfactants added in alkaline solutions passivate bare silicon surfaces by the oxidation and adsorption, respectively. The passivation of surfaces in alkaline solutions resulted in lower etch rate of silicon thereby provided smoother surfaces.s.ces.s.

• Journal of the Korean Ceramic Society
• /
• v.21 no.1
• /
• pp.33-40
• /
• 1984

To find out the optimum heating profile for the nitridation of compacts of graded silicon grains (max 53$mu extrm{m}$) two batches with the addition of MgO and $Mg(NO_3)_3$$cdot$$6H_2O$ to silicon particles were isostatically pressed into compacts. They were nitrided under some different nitriding schedules. The properties such as bulk densitis microstructures and formed phases were measured and observed. The following results were obtained ; 1) About 10% unreacted silicon remained in specimen which was nitrided at 1, 350$^{\circ}C$ for 240hrs. 2) One of the step-heating processes 1, 150$^{\circ}C$-1, 390$^{\circ}C$ for 65hrs are then $1, 390^{\circ}C$for 50hrs was the low temperature but with that at high temperature. 3) High pressure(10.5kgf/$cm^2$) of nitrogen at 1, 390$^{\circ}C$ accelerated the $\alpha$$ ightarrow$$\beta$ transformation of silicon nitride. 4) Magnesium nitrate was superior to magnesium oxide in the role of nitriding aid and the formation of uniform microstructures.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.36 no.1
• /
• pp.23-28
• /
• 2023

This paper demonstrates a novel NAND flash memory structure and annealing configuration including through-silicon via (TSV) inside the silicon substrate to improve annealing efficiency using an electro-thermal annealing (ETA) technique. Compared with the conventional ETA which utilizes WL-to-WL current flow, the proposed annealing method has a higher annealing temperature as well as more uniform heat distribution, because of thermal isolation on the silicon substrate. In addition, it was found that the annealing temperature is related to the electrical and thermal conductivity of the TSV materials. As a result, it is possible to improve the reliability of NAND flash memory. All the results are discussed based on 3-dimensional (3-D) simulations with the aid of the COMSOL simulator.

• Proceedings of the KIEE Conference
• /
• 1995.07c
• /
• pp.1025-1027
• /
• 1995

SEG(Selective Epitaxial Growth) and ELO(Epitaxial Lateral Growth) of Silicon offer new opportunities in the fabrication of MEMS(Micro Electro-Mechanical Systems) structures. SEG of silicon enables the stacking of junctions in addition to those resulting from the standard bipolar process and this properly was utilized for the fabrication of an improved-performance color sensor. When the crystalline growth takes place through the seed windows and proceeds over the dielectric, after reaching the surface, it form an ELO silicon layer and this ELO-Si can be modified into various structures for MEMS application such as cantilevers, beams, diaphragms.

• Journal of the Korean Society for Precision Engineering
• /
• v.23 no.1 s.178
• /
• pp.89-96
• /
• 2006

In this study, fabrication of the large area silicon mirror is accomplished by anisotropic wet etching using micromachining technology for implementation of integrated slim optical pickup and the process condition is also established for improving the mirror surface roughness. Until now, few results have been reported about the production of highly stepped $9.74^{\circ}$ off-axis-cut silicon wafers using wet etching. In addition rough surface of the mirror is achieved in case of tong etching time. Hence a novel method called magnetorheolocal finishing is applied to enhance the surface quality of the mirror plane. Finally, areal peak to valley surface roughness of mirror plane is reduced about 100nm in large area of $mm^2$ and it is applicable to optical pickup using infrared wavelength.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.19 no.2
• /
• pp.130-138
• /
• 2006

We have investigated pattern scaling down of silicon stamps through the oxidation technique, During oxidizing the silicon stamps, silicon dioxide that has 300 nm and 500 nm thickness was grown, and critical deformations were not observed in the patterns. There was positive effect to reduce size of patterns because vertical and horizontal patterns have different orientation. We achieved pattern reduction rate of $26\%$. In addition, the formation of polymer patterns had been investigated with varied temperature and pressure conditions to improve the filling characteristics of polymers during nanoimprint lithography when pattern sizes were few micrometers. In these varied conditions, polymers had been affected by free space compensation and elastic stress relaxation for filling the cavities. Based on the results, defect control which is an important issue in the nanoimprint lithography were facilitated.

• Journal of Korean Vacuum Science & Technology
• /
• v.1 no.1
• /
• pp.1-12
• /
• 1997

A new three-dimensional (3D) Monte Carlo ion implantation simulator, TRICSI, has been developed to investigate 3D mask effects in the typical mask structure for ion implantation into crystalline silicon. We present the mask corner and mask size effects of implanted boron range profiles, and also show the calculated damage distributions by applying the modified Kinchin-Pease equation in the single-crystal silicon target. The simulator calculates accurately and efficiently the implanted-boron range profiles under the relatively large implanted area, using a newly developed search algorithm for the collision partner in the single-crystal silicon. All of the typical implant parameters such as dose, tilt and rotation angles, in addition to energy can be used for the 3D simulation of ion implantation.

• The Korean Journal of Ceramics
• /
• v.6 no.4
• /
• pp.364-369
• /
• 2000

Silicon nitride with adding La$_2$O$_3$ was sintered by gas pressure sintering (GPS) technique at $1950^{\circ}C$, in $N_2$ gas at 3 MPa, for 2h. Mechanical properties such as hardness, flexural strength, and fracture toughness were determined as a function of the GPS holding time and the contents of La$_2$O$_3$ in silicon nitride. Also machinability of silicon nitride ball with various GPS holding time and amount of La$_2$O$_3$ was evaluated by magnetic fluid grinding (MFG) method. In this study it was found that machinability was influenced significantly with La$_2$O$_3$ contents. However, the different GPS holding time did not affect the machinability very much.

• Electronics and Telecommunications Trends
• /
• v.33 no.6
• /
• pp.1-11
• /
• 2018

Several industrial applications such as space exploration, aerospace, automotive, the downhole oil and gas industry, and geothermal power plants require specific electronic systems under extremely high temperatures. For the majority of such applications, silicon-based technologies (bulk silicon, silicon-on-insulator) are limited by their maximum operating temperature. Silicon carbide (SiC) has been recognized as one of the prime candidates for providing the desired semiconductor in extremely high-temperature applications. In addition, it has become particularly interesting owing to a Si-compatible process technology for dedicated devices and integrated circuits. This paper briefly introduces a variety of SiC-based integrated circuits for use under extremely high temperatures and covers the technology trend of SiC CMOS devices and processes including the useful implementation of SiC ICs.