• Title/Summary/Keyword: Signal Processing Circuit

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A Study on Motion Estimator Design Using DCT DC Value (DCT 직류 값을 이용한 움직임 추정기 설계에 관한 연구)

  • Lee, Gwon-Cheol;Park, Jong-Jin;Jo, Won-Gyeong
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.38 no.3
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    • pp.258-268
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    • 2001
  • The compression method is necessarily used to send the high quality moving picture that contains a number of data in image processing. In the field of moving picture compression method, the motion estimation algorithm is used to reduce the temporal redundancy. Block matching algorithm to be usually used is distinguished partial search algorithm with full search algorithm. Full search algorithm be used in this paper is the method to compare the reference block with entire block in the search window. It is very efficient and has simple data flow and control circuit. But the bigger the search window, the larger hardware size, because large computational operation is needed. In this paper, we design the full search block matching motion estimator. Using the DCT DC values, we decide luminance. And we apply 3 bit compare-selector using bit plane to I(Intra coded) picture, not using 8 bit luminance signals. Also it is suggested that use the same selective bit for the P(Predicted coded) and B(Bidirectional coded) picture. We compare based full search method with PSNR(Peak Signal to Noise Ratio) for C language modeling. Its condition is the reference block 8$\times$8, the search window 24$\times$24 and 352$\times$288 gray scale standard video images. The result has small difference that we cannot see. And we design the suggested motion estimator that hardware size is proved to reduce 38.3% for structure I and 30.7% for structure II. The memory is proved to reduce 31.3% for structure I and II.

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Design of a CMOS Tx RF/IF Single Chip for PCS Band Applications (PCS 대역 송신용 CMOS RF/IF 단일 칩 설계)

  • Moon, Yo-Sup;Kwon, Duck-Ki;Kim, Keo-Sung;Park, Jong-Tae;Yu, Chong-Gun
    • Journal of IKEEE
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    • v.7 no.2 s.13
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    • pp.236-244
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    • 2003
  • In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

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A Study on Maximizing the Matching Ratio of Scintillation Pixels and Photosensors of PET Detector using a Small Number of Photosensors (적은 수의 광센서를 사용한 PET 검출기의 섬광 픽셀과 광센서 매칭 비율의 최대화 연구)

  • Lee, Seung-Jae;Baek, Cheol-Ha
    • Journal of the Korean Society of Radiology
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    • v.15 no.5
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    • pp.749-754
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    • 2021
  • In order to maximize the matching ratio between the scintillation pixel and the photosensor of the PET detector using a small number of photosensor, various arrays of scintillation pixels and four photosensors were used. The array of scintillation pixels consisted of six cases from 6 × 6 to 11 × 11. The distance between the photosensors was applied equally to all scintillation pixels, and the arrangement was expanded by reducing the size of scintillation pixel. DETECT2000 capable of light simulation was used to acquire flood images of the designed PET detectors. At the center of each scintillation pixel array, light generated through the interaction between extinction radiation and scintillation pixels was generated, and the light was detected through for four photosensors, and then a flood image was reconstructed. Through the reconstructed flood image, we found the largest arrangement in which all the scintillation pixels can be distinguished. As a result, it was possible to distinguish all the scintillation pixels in the flood image of 8 × 8 scintillation pixel array, and from the 9 × 9 scintillation pixel flood image, the two edge scintillation pixels overlapped and appeared in the image. At this time, the matching ratio between the scintillation pixel and the photosensor was 16:1. When a PET system is constructed using this detector, the number of photosensors used is reduced and the cost of the oveall system is expected to be reduced through the simplification of the signal processing circuit.