• Honam Mathematical Journal
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• v.30 no.1
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• pp.9-20
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• 2008

Let ${X_i{\mid}i{\geq}1}$ be a strictly stationary sequence of associated random variables with mean zero and let ${\sigma}^2=EX_1^2+2\sum\limits_{j=2}^\infty{EX_1}{X_j}$ with 0 < ${\sigma}^2$ < ${\infty}$. Set $S_n={\sum\limits^n_{i=1}^\{X_i}$, the precise asymptotics for ${\varepsilon}^{{\frac{2(r-p)}{2-p}}-1}\sum\limits_{n{\geq}1}n^{{\frac{r}{p}}-{\frac{1}{p}}+{\frac{1}{2}}}P({\mid}S_n{\mid}{\geq}{\varepsilon}n^{{\frac{1}{p}}})$,${\varepsilon}^2\sum\limits_{n{\geq}3}{\frac{1}{nlogn}}p({\mid}Sn{\mid}{\geq}{\varepsilon\sqrt{nloglogn}})$ and ${\varepsilon}^{2{\delta}+2}\sum\limits_{n{\geq}1}{\frac{(loglogn)^{\delta}}{nlogn}}p({\mid}S_n{\mid}{\geq}{\varepsilon\sqrt{nloglogn}})$ as ${\varepsilon}{\searrow}0$ are established under the suitable conditions.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.5
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• pp.808-815
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• 1990

This paper treats with the design method for the single loop oversampled Sigma-Delta A/D converter with one delay and the digital integrator. Such an integrator was kgenerated by means of the bilinear transform of the analog integrator. The frequency spectrums of the quantizer and the decimator output signal are evaluated by FFT respectively. With the performance evaluation system, the values of SNR are obtained versus the input sinusoidal signal amplitude, frequency, the oversampling ratio, the DC-input level, the loop gain and the limitting value of the integrator. As compared with existing results, values of SNR versus the input signal amplitude and the oversampling ratio for the suggested system are about 6dB higher then previously reported results respectively. Furthermore, this approach achieves an about 60dB input dynamic range.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.436-438
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• 2005

본 논문에서는 전력선 위상 측정을 위해 A/D 변환기 및 위상계측 연산장치를 집적한 하이브리드 센서칩의 구현 기법을 제시하였다. 개발한 위상계측 연산장치는 recursive sliding-DFT에 기반하였으며 곱셈기의 시분할 공유 구조를 사용하여 칩의 구현 면적을 최소화 하였다. 60Hz의 전력선 신호를 중심주파수로 하는 AD 변환장치는 sigma-delta ADC를 기반으로 하여 8-bit 정밀도를 제공하며 아날로그부의 구현을 최소화하도륵 설계하였다. 설계한 하이브리드 센서칩은 컴퓨터 시뮬레이션 및 FPGA 구현을 통해 동작을 검증하였으며, 검증 완료후 $0.35{\mu}m$ CMOS 공정기술로 구현하였다. 전력선 위상을 측정하기 위해 구현된 4채널 하이브리드 센서 칩의 설계면적은 $5{\times}5m^2$ 의 약 20%정도를 차지하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.3
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• pp.313-321
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• 2014

A low-power low-cost polar transmitter for EDGE is designed in $0.18{\mu}m$ CMOS. A differential delta-sigma modulator (DSM) tunes a three-terminal voltage-controlled oscillator (VCO) to perform RF phase modulation, where the VCO tuning curve is digitally pre-compensated for high linearity and the carrier frequency is calibrated by a dual-mode low-power frequency-locked loop (FLL). A digital intermediate-frequency (IF) pulse-width5 modulator (PWM) drives a complementary power-switch followed by an LC filter to achieve envelope modulation with high efficiency. The proposed transmitter with 9mW power dissipation relaxes the time alignment between the phase and envelope modulations, and achieves an error vector magnitude (EVM) of 4% and phase noise of -123dBc/Hz at 400kHz offset frequency.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.437-438
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• 2008

This paper proposes a 8th-order single loop band-pass sigma-delta modulator that satisfies a wide bandwidth of 6MHz, which is required for a HDTV application. The proposed architecture is based on a simple analog structure that enlarges the noise shaping with a low OSR. In addition, a feedforward scheme is used to relax op-amp performance requirements. The proposed modulator has been simulated using the 0.18um 1.8v TSMC technology. The simulation results show that the bandwidth is 6MHz and SNQR is 70dB.

• Journal of the Korean Chemical Society
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• v.22 no.5
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• pp.317-319
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• 1978

The change of the electron densities of polydentate amine ligands in the reaction of protonation are discussed on the basis of the calculation by Two Center Huckel method. From results, such as ${\Delta}E_{\sigma}$, $q_N,\;q_H$ , and observed pKb, it is concluded that the stabilities of polydentate amine ligands are in the order of trien > en > gly > dien.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.282-290
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• 2013

This paper describes a spread spectrum clock generator (SSCG) circuit for DisplayPort 1.2 standard. A Hershey-Kiss modulation profile is generated by dual sigma-delta modulators. The structure generates various modulation slopes to shape a non-linear modulation profile. The proposed SSCG for DisplayPort 1.2 generates clock signals with 5000 ppm down spreading with a Hershey-Kiss modulation profile at three different clock frequencies, 540 MHz, 270 MHz and 162 MHz. The measured peak power reduction is about 15.6 dB at 540 MHz with the chip fabricated using a $0.13{\mu}m$ CMOS technology.

• Journal of IKEEE
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• v.17 no.3
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• pp.248-253
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• 2013

Frequency detector is a circuit that converts the frequency to a digital representation and finds its application in various fields such as modulator and synchronization circuitry. In this paper, a couple of first-order and second-order frequency discriminator structures are modeled and analyzed with their quantization noise sources. Also a delta-sigma frequency detector architecture is proposed. Through theoretical analysis and derived equations, the output noise is obtained, which is validated by simulation. The proposed all-digital frequency discriminator may be applied in the feedback path of the all-digital phase-locked loop.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.982-985
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• 1999

An efficient technique to trade off speed for resolution is the sigma-delta modulation (SDM). This paper proposes a new SDM architecture to improve conversion rates and SNR(Signal-to Noise Ratio) by using master clock and four divided clock. The charateristics of the proposed SDM are simulated in MATLAB environment. and optimizing the capacitor sizes is done by iterative processing. other analog characteristics are simulated using 0.65${\mu}{\textrm}{m}$ n-well CMOS process, double poly and single metal. The result of simulation shows that more increasing the effective bits of internal ADC/DAC, bigger the improvement of SNR.

• Bulletin of the Korean Chemical Society
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• v.25 no.5
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• pp.620-624
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• 2004

Optical emission studies were performed to investigate thermal and dynamical properties of a plume produced by laser ablation of a graphite target in a nitrogen atmosphere. Experimental spectra of $C_2(d^3{\Pi}_g{\to}a^3{\Pi}_u$, ${\Delta}_V$=1) and CN ($B^2{\Sigma}^+{\to}X^2{\Sigma}^+,{\Delta}_V=0)$ were simulated to obtain the vibrational and rotational temperatures of the electronically excited species at various laser fluences and distances from the target. The spectroscopic temperatures of both molecules were found to be nearly independent of the laser fluence. The temperature of CN molecules was peaked in the middle of the plume while that of $C_2$decreased with increase in the distance. At a given distance, the temperature of CN molecules was clearly higher than that of $C_2$.