• Korean Journal of Materials Research
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• v.23 no.6
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• pp.316-321
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• 2013

The electrical properties and surface morphology changes of a silicon wafer as a function of the HF concentration as the wafer is etched were studied. The HF concentrations were 28, 30, 32, 34, and 36 wt%. The surface morphology changes of the silicon wafer were measured by an SEM ($80^{\circ}$ tilted at ${\times}200$) and the resistivity was measured by assessing the surface resistance using a four-point probe method. The etching rate increased as the HF concentration increased. The maximum etching rate 27.31 ${\mu}m/min$ was achieved at an HF concentration of 36 wt%. A concave wave formed on the wafer after the wet etching process. The size of the wave was largest and the resistivity reached 7.54 $ohm{\cdot}cm$ at an 30 wt% of HF concentration. At an HF concentration of 30 wt%, therefore, a silicon wafer should have good joining strength with a metal backing as well as good electrical properties.

• Korean Journal of Materials Research
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• v.14 no.5
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• pp.315-321
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• 2004

The void evolution in direct bonding process of $Si/Si_3$$N_4$ ∥ $SiO_2$/Si silicon wafer pairs has been investigated with an infrared camera. The voids that formed in the premating process grew in the conventional furnace annealing process at a temperature of $600^{\circ}C$. The voids are never shrunken even with the additional annealing process at the higher temperatures. We observed that the voids became smaller and disappeared with sequential scanning by our newly proposed fast linear annealing(FLA). FLA irradiates the focused line-shape halogen light on the surface while wafer moves from one edge to the other. We also propose the void shrinking mechanism in FLA with the finite differential method (FDM). Our results imply that we may eliminate the voids and enhance the yield for the direct bonding of wafer pairs by employing FLA.

• Tribology and Lubricants
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• v.17 no.4
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• pp.276-282
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• 2001

Nano adhesion between SPM (scanning probe microscope) tips and 075 (octadecyltrichlorosilane) SAM (self-assembled monolayer) was experimentally studied. Tests were performed to measure the nano adhesion and friction in both AFM(atomic force microscope) and LFM(lateral force microscope) modes in various conditions of relative humidity. OTS SAM was formed on Si-wafer (100) surfaces, and Si$_3$N$_4$ tips of different radius of curvature were used. When the surface was hydrophobic, the adhesion and friction forces were found lower than those of bare Si-wafer. Results also showed that micro-adhesion force increased as the relative humidity and the tip radius of curvature increased. The main parameter for affecting the micro-adhesion was found absorbed humidity on the contact surface. These results were discussed with the JKR model and a capillary force caused by absorbed water.

• Journal of the Semiconductor & Display Technology
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• v.11 no.2
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• pp.71-74
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• 2012

Uniformity of the wafer temperature is one of the important factors in etching process. Plasma, chucking force, backside helium pressure and the surface temperature of ESC(electrostatic chuck) affect the wafer temperature. ESC consists of several layers of structure. Each layer has own thermal resistance and the Si-adhesive layer has highest thermal resistance among them. In this work, the temperature distribution of ESC was analyzed by 3-D FEM with various defects and the thickness deviation of the Si-adhesive layer. The result with Si-adhesive layer with the low center thickness deviation shows modified temperature distribution of ESC surface.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.17 no.2
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• pp.1-6
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• 2008

In recent years, developments in the semiconductor and electronic industries have brought a rapid increase in the use of large size silicon wafer. For further improvement of the ultra precision surface and flatness of Si wafer necessary to high density ULSI, it is known that polishing is very important. However, most of these investigation was experiment less than 300mm diameter. Polishing is one of the important methods in manufacturing of Si wafers and in thinning of completed device wafers. This study reports the machining variables that has major influence on the characteristic of wafer polishing. It was adapted to polishing pressure, machining speed, and the slurry mix ratio, the optimum condition is selected by ultra precision wafer polishing using load cell and infrared temperature sensor. The optimum machining condition is selected a result data that use a pressure and table speed data. By using optimum condition, it achieves a ultra precision mirror like surface.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.830-833
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• 2003

This paper describes the fabrication and characteristics of 3C-SiCOI sotctures by SDB and etch-back technology for high-temperature MEMS applications. In this work, insulator layers were formed on a heteroepitaxial 3C-SiC film grown on a Si(001) wafer by thermal wet oxidation and PECVD process, successively. The pre-bonding of two polished PECVD oxide layers made the surface activation in HF and bonded under applied pressure. The wafer bonding characteristics were evaluated by the effect of HF concentration used in the surface treatment on the roughness of the oxide and pre-bonding strength. Hydrophilic character of the oxidized 3C-SiC film surface was investigated by ATR-FTIR. The strength of the bond was measured by tensile strengthmeter. The bonded interface was also analyzed by SEM. The properties of fabricated 3C-SiCOI structures using etch-back technology in TMAH solution were analyzed by XRD and SEM. These results indicate that the 3C-SiCOI structure will offers significant advantages in the high-temperature MEMS applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.11
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• pp.953-957
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• 2002

Single crystal 3C-SiC (cubic silicon carbide) thin-films were deposited on Si(100) wafer up to the thickness of 4.3 ${\mu}{\textrm}{m}$ by APCVD (atmospheric pressure chemical vapor deposition) method using HMDS (hexamethyildisilane; ｛CH$_{3}$｝$_{6}$ Si$_{2}$) at 135$0^{\circ}C$. The HMDS flow rate was 0.5 sccm and the carrier gas flow rate was 2.5 slm. The HMDS flow rate was important to get a mirror-like crystal surface. The growth rate of the 3C-SiC film was 4.3 ${\mu}{\textrm}{m}$/hr. The 3C-SiC epitaxial film grown on Si(100) wafer was characterized by XRD (X-ray diffraction), AFM (atomic force microscopy), RHEED (reflection high energy electron diffraction), XPS (X-ray photoelecron spectroscopy), and Raman scattering, respectively. Two distinct phonon modes of TO (transverse optical) near 796 $cm^{-1}$ / and LO (longitudinal optical) near 974$\pm$1 $cm^{-1}$ / of 3C-SiC were observed by Raman scattering measurement. The heteroepitaxially grown film was identified as the single crystal 3C-SiC phase by XRD spectra (2$\theta$=41.5。).).

• KIEE International Transactions on Electrophysics and Applications
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• v.4C no.3
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.

• Korean Journal of Materials Research
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• v.12 no.2
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• pp.117-120
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• 2002

We investigated the possibility of direct bonding of the Si ∥SiO$_2$/Si$_3$N$_4$∥Si wafers for Oxide-Nitride-Oxide(ONO) gate oxide applications. 10cm-diameter 2000$\AA$-thick thermal oxide/Si(100) and 500$\AA$-Si$_3$N$_4$LPCVD/Si (100) wafers were prepared, and wet cleaned to activate the surface as hydrophilic and hydrophobic states, respectively. Cleaned wafers were premated wish facing the mirror planes by a specially designed aligner in class-100 clean room immediately. Premated wafer pairs were annealed by an electric furnace at the temperatures of 400, 600, 800, 1000, and 120$0^{\circ}C$ for 2hours, respectively. Direct bonded wafer pairs were characterized the bond area with a infrared(IR) analyzer, and measured the bonding interface energy by a razor blade crack opening method. We confirmed that the bond interface energy became 2,344mJ/$\m^2$ when annealing temperature reached 100$0^{\circ}C$, which were comparable with the interface energy of homeogenous wafer pairs of Si/Si.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.11 no.6
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• pp.48-54
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• 2012

In recent years, developments in the semiconductor and electronic industries have brought a rapid increase in the use of large size silicon. However, for many companies, it is hard to produce 400mm or 450mm wafers, because of excesive funds for exchange the equipments. Therefore, it is necessary to investigate 300mm wafer to obtain a better efficiency and a good property rate. Polishing is one of the important methods in manufacturing of Si wafers and in thinning of completed device wafers. This research investigated the surface characteristics that apply variable machining conditions and Taguchi Method was used to obtain more flexible and optimal condition. In this study, the machining conditions have head speed, oscillation speed and polishing time. By using optimum condition, it achieves a ultra precision mirror like surface.