• Title/Summary/Keyword: Semiconductor reliability

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A Study on sub 0.1$\mu\textrm{m}$ ULSI Device Quality Using Novel Titanium Silicide Formation Process & STI (새로운 티타늅 실리사이드 형성공정과 STI를 이용한 서브 0,1$\mu\textrm{m}$ ULSI급 소자의 특성연구)

  • Eom, Geum-Yong;O, Hwan-Sul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.5
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    • pp.1-7
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    • 2002
  • Deep sub-micron bulk CMOS circuits require gate electrode materials such as metal silicide and titanium silicide for gate oxides. Many authors have conducted research to improve the quality of the sub-micron gate oxide. However, few have reported on the electrical quality and reliability of an ultra-thin gate. In this paper, we will recommend a novel shallow trench isolation structure and a two-step TiS $i_2$ formation process to improve the corner metal oxide semiconductor field-effect transistor (MOSFET) for sub-0.1${\mu}{\textrm}{m}$ VLSI devices. Differently from using normal LOCOS technology, deep sub-micron CMOS devices using the novel shallow trench isolation (STI) technology have unique "inverse narrow-channel effects" when the channel width of the device is scaled down. The titanium silicide process has problems because fluorine contamination caused by the gate sidewall etching inhibits the silicide reaction and accelerates agglomeration. To resolve these Problems, we developed a novel two-step deposited silicide process. The key point of this process is the deposition and subsequent removal of titanium before the titanium silicide process. It was found by using focused ion beam transmission electron microscopy that the STI structure improved the narrow channel effect and reduced the junction leakage current and threshold voltage at the edge of the channel. In terms of transistor characteristics, we also obtained a low gate voltage variation and a low trap density, saturation current, some more to be large transconductance at the channel for sub-0.1${\mu}{\textrm}{m}$ VLSI devices.

Comparison of Surface Passivation Layers on InGaN/GaN MQW LEDs

  • Yang, Hyuck-Soo;Han, Sang-Youn;Hlad, M.;Gila, B.P.;Baik, K.H.;Pearton, S.J.;Jang, Soo-Hwan;Kang, B.S.;Ren, F.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.2
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    • pp.131-135
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    • 2005
  • The effect of different surface passivation films on blue or green (465-505 nm) InGaN/GaN multi-quantum well light-emitting diodes (LEDs) die were examined. $SiO_2$ or $SiN_x$ deposited by plasma enhanced chemical vapor deposition, or $Sc_2O_3$ or MgO deposited by rf plasma enhanced molecular beam epitaxy all show excellent passivation qualities. The forward current-voltage (I-V) characteristics were all independent of the passivation film used, even though the MBE-deposited films have lower interface state densities ($3-5{\times}10^{12}\;eV^{-1}\;cm^{-2}$) compared to the PECVD films (${\sim}10^{12}\;eV^{-1}\;cm^{-2}$), The reverse I-V characteristics showed more variation, hut there was no systematic difference for any of the passivation films, The results suggest that simple PECVD processes are effective for providing robust surface protection for InGaN/GaN LEDs.

Cu Metallization for Giga Level Devices Using Electrodeposition (전해 도금을 이용한 기가급 소자용 구리배선 공정)

  • Kim, Soo-Kil;Kang, Min-Cheol;Koo, Hyo-Chol;Cho, Sung-Ki;Kim, Jae-Jeong;Yeo, Jong-Kee
    • Journal of the Korean Electrochemical Society
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    • v.10 no.2
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    • pp.94-103
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    • 2007
  • The transition of interconnection metal from aluminum alloy to copper has been introduced to meet the requirements of high speed, ultra-large scale integration, and high reliability of the semiconductor device. Since copper, which has low electrical resistivity and high resistance to degradation, has different electrical and material characteristics compared to aluminum alloy, new related materials and processes are needed to successfully fabricate the copper interconnection. In this review, some important factors of multilevel copper damascene process have been surveyed such as diffusion barrier, seed layer, organic additives for bottom-up electro/electroless deposition, chemical mechanical polishing, and capping layer to introduce the related issues and recent research trends on them.

Numerical Thermal Analysis of IGBT Module Package for Electronic Locomotive Power-Control Unit (전동차 추진제어용 IGBT 모듈 패키지의 방열 수치해석)

  • Suh, Il Woong;Lee, Young-ho;Kim, Young-hoon;Choa, Sung-Hoon
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.39 no.10
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    • pp.1011-1019
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    • 2015
  • Insulated-gate bipolar transistors (IGBTs) are the predominantly used power semiconductors for high-current applications, and are used in trains, airplanes, electrical, and hybrid vehicles. IGBT power modules generate a considerable amount of heat from the dissipation of electric power. This heat generation causes several reliability problems and deteriorates the performances of the IGBT devices. Therefore, thermal management is critical for IGBT modules. In particular, realizing a proper thermal design for which the device temperature does not exceed a specified limit has been a key factor in developing IGBT modules. In this study, we investigate the thermal behavior of the 1200 A, 3.3 kV IGBT module package using finite-element numerical simulation. In order to minimize the temperature of IGBT devices, we analyze the effects of various packaging materials and different thickness values on the thermal characteristics of IGBT modules, and we also perform a design-of-experiment (DOE) optimization

Real-time Matrix type CRC in High-Speed SDRAM (고속 SDRAM에서 실시간 Matrix형 CRC)

  • Lee, Joong-Ho
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.509-516
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    • 2014
  • CRC feature in a high-speed semiconductor memory devices such as DDR4/GDDR5 increases the data reliability. Conventional CRC method have a massive area overhead and long delay time. It leads to insufficient internal timing margins for CRC calculation. This paper, presents a CRC code method that provides error detection and a real-time matrix type CRC. If there are errors in the data, proposed method can alert to the system in a real-time manner. Compare to the conventional method(XOR 6 stage ATM-8 HEC code), the proposing method can improve the error detection circuits up to 60% and XOR stage delay by 33%. Also the real-time error detection scheme can improve the error detection speed to agerage 50% for the entire data bits(UI0~UI9).

A study on the development of 50W AC direct type engine with integrated reflector starting (리플렉터 일체형 50W급 AC 직결형 엔진개발에 관한 연구)

  • Son, Seok-Geum
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.11 no.4
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    • pp.388-393
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    • 2018
  • In this paper, We developed a high efficiency reflector integrated type 50W AC direct connection type engine to realize miniaturization and weight reduction of product without using SMPS and to design a multistage varistor circuit Reduced costs by reducing the number of parts High reliability is achieved by using a circuit structure that does not use an electrolytic capacitor, thus increasing the lifetime of the LED. In addition, it is possible to manufacture an AC direct-coupled type driving device by using an IC semiconductor and apply an AC direct-coupled type driving device integrated with a reflector so that the lifetime of the device can be fully utilized for the lifetime of the LED, A light source having a plurality of light emitting diode channels including a plurality of light emitting diode channels arranged in series is driven with a rectified voltage.

Fabrication of IGZO-based Oxide TFTs by Electron-assisted Sputtering Process

  • Yun, Yeong-Jun;Jo, Seong-Hwan;Kim, Chang-Yeol;Nam, Sang-Hun;Lee, Hak-Min;O, Jong-Seok;Kim, Yong-Hwan
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.273.2-273.2
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    • 2014
  • Sputtering process has been widely used in Si-based semiconductor industry and it is also an ideal method to deposit transparent oxide materials for thin-film transistors (TFTs). The oxide films grown at low temperature by conventional RF sputtering process are typically amorphous state with low density including a large number of defects such as dangling bonds and oxygen vacancies. Those play a crucial role in the electron conduction in transparent electrode, while those are the origin of instability of semiconducting channel in oxide TFTs due to electron trapping. Therefore, post treatments such as high temperature annealing process have been commonly progressed to obtain high reliability and good stability. In this work, the scheme of electron-assisted RF sputtering process for high quality transparent oxide films was suggested. Through the additional electron supply into the plasma during sputtering process, the working pressure could be kept below $5{\times}10-4Torr$. Therefore, both the mean free path and the mobility of sputtered atoms were increased and the well ordered and the highly dense microstructure could be obtained compared to those of conventional sputtering condition. In this work, the physical properties of transparent oxide films such as conducting indium tin oxide and semiconducting indium gallium zinc oxide films grown by electron-assisted sputtering process will be discussed in detail. Those films showed the high conductivity and the high mobility without additional post annealing process. In addition, oxide TFT characteristics based on IGZO channel and ITO electrode will be shown.

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Alignment Patterns and Position Measurement System for Precision Alignment of Roll-to-Roll Printing (롤투롤 인쇄전자공정에서 중첩정밀도 향상을 위한 정렬패턴과 위치 측정시스템)

  • Seo, Youngwon;Yim, Seongjin;Oh, Dongho
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.36 no.12
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    • pp.1563-1568
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    • 2012
  • Printed electronics is a technology used for forming electronic circuits or devices, and it is used in the manufacture of many products such as RFID tags, solar cells, and flexible display panels with a much lower cost than in the case of semiconductor process technology. Web-guide-type printing such as roll-to-roll printing is a method used to produce printed electronic devices in a large volume. To commercialize such products, highly precise alignment between printed layers is required. In this study, a highly precise alignment system is proposed, and some experimental results are compared with those obtained using a laser surface vibrometer to illustrate the reliability of the proposed system. The robustness of the proposed system to web deformation is also considered experimentally.

A Study on Application of Time-Triggered Ethernet for Vehicle Network (타임-트리거드 이더넷의 차량네트워크 적용 연구)

  • Park, Mi-Ryong;Yoon, Mihee;Na, Ke-Yeol;Kim, Dongwon
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.15 no.6
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    • pp.79-88
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    • 2015
  • In this paper, we examine Ethernet based vehicle network which is recently emerging technology. Current MOST for entertainment will be soon replaced with the emerging Ethernet based vehicle network. Although legacy standard Ethernet has several advantages it is not suitable for vehicle backbone network without any modification. As a result, many researches are happening on extending and modification of the Ethernet function for realtime and reliability. Time-triggered Ethernet, one of many trials known as AS6802, is investigated on the architecture and functionalities. We design the traffic model on Time-triggered Ethernet and analyse the latency of the network. We also consider the QoS requirement and environment of operating configuration for vehicle network.

A Boundary-Scan Based On-Line Circuit Performance Monitoring Scheme (경계 스캔 기반 온-라인 회로 성능 모니터링 기법)

  • Park, Jeongseok;Kang, Taegeun;Yi, Hyunbean
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.1
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    • pp.51-58
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    • 2016
  • As semiconductor technology has developed, device performance has been improved. However, since device structures became smaller, circuit aging due to operational and environmental conditions can be accelerated. Circuit aging causes a performance degradation and eventually a system error. In reliable systems, a failure due to aging might cause a great disaster. Therefore, these systems need a performance degradation prediction function so that they can take action in advance before a failure occurs. This paper presents an on-line circuit performance degradation monitoring scheme for predicting a failure by detecting performance degradation during circuit normal operation. In our proposed scheme, IEEE 1149.1 output boundary scan cells and TAP controller are reused. The experimental result shows that the proposed architecture can monitor the performance degradation during normal operation without stopping the circuit.