• 제목/요약/키워드: Semiconductor Thermal Processing

검색결과 55건 처리시간 0.026초

HCI 첨가에 의한 RTO/RTN 이중 절연박막의 전기적 특성 변화 (Effects of the Contents of Hydrochloric Gas on the Electrical Properties of the RTO/RTN Dual Dielectric Films)

  • 김윤태;박성호;배남진;김보우;마동성
    • 대한전자공학회논문지
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    • 제25권11호
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    • pp.1350-1357
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    • 1988
  • 독립적인 nitridation step이 포함된 급속 열처리 공정을 이용하여 125-180A 두께의 이중 절연박막을 단결정 실리콘 상에 형성하였다. HCl 가스의 첨가량과 공정시간의 변화에 따른 박막 특성의 변화를 고찰하였고, 이에 따른 박막의 전기적 특성을 관찰하였다. HCl 가스의 첨가에 의해 초기의 산화막 두께의 성장은 현저하게 나타났으나, nitridation 후의 박막두께의 변화는 10A 이하로 매우 저조하였다. 이중 절연박막의 항복전압은 HCl 가스의 첨가량에 비례하여 점차 증가하였고, 절연강도는 furnace나 독립적인 nitridation step이 포함되지 않은 급속 열처리 공정으로 형성한 같은 두께의 박막에 비해 높은 것으로 분석되었다.

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열교환 부품용 발열체 형성기술 (The Formation Technique of Thin Film Heaters for Heat Transfer Components)

  • 조남인;김민철
    • 반도체디스플레이기술학회지
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    • 제2권4호
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    • pp.31-35
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    • 2003
  • We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

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제너 다이오드를 이용한 공기 유속계측 장치개발

  • 김영재;김희식;조흥근
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 1996년도 추계학술대회 논문집
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    • pp.496-500
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    • 1996
  • An air flow measurement device is proposed. The thermal characteristic of a semiconductor element is adopted as a cooling parameter of thermal convection rate. The difference between forced convection and natural convection of two Zener diodes results enough difference in temperature. Experiment at various air flow conditions shows the measuring capability of the air flow in a duct. This measuring device has some merits, such as a reliability n hard field condition, simple circuit for signal processing, small volume of the element, less air flow resistance, independance of various ai temperature. The experimental result shows that it is an exact and usefull air flow measurement device.

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DC 스퍼터링을 이용한 소다라임 유리 기판상에 2차원 황화텅스텐 박막 형성 공정 (DC Sputtering Process of 2-Dimensional Tungsten Disulfide Thin Films on Soda-Lime Glass Substrates)

  • 마상민;권상직;조의식
    • 반도체디스플레이기술학회지
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    • 제17권3호
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    • pp.31-35
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    • 2018
  • Tungsten disulfide($WS_2$) thin films were directly deposited by direct-current(DC) sputtering and annealed by rapid thermal processing(RTP) to materialize two-dimensional p-type transition metal dichalcogenide (TMDC) thin films on soda-lime glass substrates without any complicated exfoliation/transfer process. $WS_2$ thin films deposited at various DC sputtering powers from 80 W to 160W were annealed at different temperatures from $400^{\circ}C$ to $550^{\circ}C$ considering the melting temperature of soda-lime glass. The optical microscope results showed the stable surface morphologies of the $WS_2$ thin films without any defects. The X-ray photoelectron spectroscopy (XPS) results and the Hall measurement results showed stable binding energies of W and S and high carrier mobilities of $WS_2$ thin films.

SILO 구조의 제작 방법과 소자 분리 특성 (Fabrication and characterization of SILO isolation structure)

  • 최수한;장택용;김병렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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    • pp.328-331
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    • 1988
  • Sealed Interface Local Oxidation (SILO) technology has been investigated using a nitride/oxide/nitride three-layered sandwich structure. P-type silicon substrate was either nitrided by rapid thermal processing, or silicon nitride was deposited by LPCVD method. A three-layered sandwich structure was patterned either by reactive ion etch (RIE) mode or by plasma mode. Sacrificial oxidation conditions were also varied. Physical characterization such as cross-section analysis of field oxide, and electrical characterization such as gate oxide integrity, junction leakage and transistor behavior were carried out. It was found that bird's beak was nearly zero or below 0.1um, and the junction leakages in plasma mode were low compared to devices of the same geometry patterned in RIE mode, and gate oxide integrity and transistor behavior were comparable. Conclusively, SILO process is compatible with conventional local oxidation process.

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Effect of Cr2O3 Content on Densification and Microstructural Evolution of the Al2O3-Polycrystalline and Its Correlation with Toughness

  • Seo, Mi-Young;Kim, Hee-Seung;Kim, Ik-Jin
    • 한국세라믹학회지
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    • 제43권8호
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    • pp.469-471
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    • 2006
  • The effects of $Cr_2O_3$ on the microstructural evolution and mechanical properties of $Al_2O_3$ polycrystalline were investigated. The microstructure of $Al_2O_3-Cr_2O_3$ composites (ruby) was carefully controlled in order to obtain dense and fine-grained ceramics, thereby improving their properties and reliability with respect to numerous applications related to semiconductor bonding technology. Ruby composites were produced by Ceramic Injection Molding (CIM) technology. Room temperature strength, hardness, Young's modulus and toughness were determined, as well as surface strengthening induced by thermal treatment and production of a fine-grained homogenous microstructure.

중대사고 조건에서 회로 모델링 모의시험을 통한 새로운 신호분기의 설계 (Design for a New Signals Analyzer through the Circuit Modeling Simulation under Severe Accident Conditions)

  • 구길모;김상백;김희동;강희영;강해용
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.171-174
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    • 2005
  • The circuit simulation analysis and diagnosis methods are used to instruments in detail when they give apparently abnormal readings. In this paper, a new simulator through an analysis of the important circuits modeling under severe accident conditions has been designed, the realization for a body work instead of the two sorts of the Labview & Pspice as an one order command in the Labview program. The program can be shown the output graph form the circuit modeling as an order commend. The procedure for the simulator design was divided into two design steps, of which the first step was the diagnosis methods, the second step was the circuit simulator for the signal processing tool. It has three main functions which are a signal processing tool, an accident management tool, and an additional guide from the initial screen.

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반도체 웨이퍼의 스트레스 측정을 위한 공정 및 표면 검사시스템 구현 (Implementation of process and surface inspection system for semiconductor wafer stress measurement)

  • 조태익;오도창
    • 대한전자공학회논문지SD
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    • 제45권8호
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    • pp.11-16
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    • 2008
  • 본 논문에서는 먼저 RTP(Rapid Thermal Processor) 장치를 스트레스 측정에 용이한 구조로 제작하고 PC에서 통합 공정관리 시스템을 설계하였다. 다음으로는 Large deformation 이론을 바탕으로 반도체 웨이퍼 표면의 변형검사를 위한 레이져 인터페로미터리를 구성하였다. 궁극적으로 이러한 레이져장치로부터 웨이퍼 표면의 영상을 추출하고 세선화, 블록화 그리고 스트레스 분포도의 순서로 영상처리 하여 스트레스로 인한 웨이퍼 표면의 변형을 검사하였다. 실험을 하기 위해 변형이 이루어지도록 웨이퍼의 후면을 1mm정도 갈아낸 후 약 1000도에서 $3\sim4$회 열처리를 수행하였으며, 열처리를 가한 영상과 가하지 않은 영상을 통하여 웨이퍼 열처리 후 심각한 변형이 이루어졌음을 알 수 있었다.

반도체 공정에서 웨이퍼의 온도균일도향상을 위한 고속열처리공정기의 최적 파라미터 설계 (The optimal paremeter design of rapid thermal processing to improve wafer temperature uniformity on the semiconductor manufacturing)

  • 최성규;최진영;권욱현
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 1997년도 한국자동제어학술회의논문집; 한국전력공사 서울연수원; 17-18 Oct. 1997
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    • pp.1508-1511
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    • 1997
  • In this paper, design parameters of Rapid Thermal Processing(RrW) to minimize the wafer tempera ture uniformity errors are proposed. 1,anip ling positions and the wafer height are important parameters for waf er temperature uniformity in R'I'P. We propose the method to seek lamp ling positions and the wafer height for optimal temperature uniformity. l'he ~~roposed method is applied to seek optimal lamp ling positions and the waf er height of 8 inch wafer. 'I'o seek the optimal lamp ling positions and the wafer height, we var\ulcorner. lamp ling 110s itions and the wafer height and then formulate the wafer temperature uniformity problem to the linear programmi ng problem. Finally, it is shown that the wafer temperature uniformity in RI'I' designed by optimal prarneters is improved to comparing with Ii'l'P designed by the other method.

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반도체 열처리 공정을 위한 온도 조절기용 전력 제어장치의 설계 및 제작 (Design and Fabrication of Power Controller for Temperature Control on Semiconductor Thermal Processing)

  • 주동만;민경일;황재효
    • 한국산학기술학회논문지
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    • 제3권4호
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    • pp.257-262
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    • 2002
  • 위상 제어방식을 이용한 급속열처리 장비의 온도조절기용 전력 제어장치를 설계하는 방법을 제시한다. 본 논문에서 제시된 설계 방법에 따라 전력제어장치를 제작·실험한 결과 가변입력제어신호 (0∼10 V)에 대해 가변출력평균전압(0∼198.06 V), 제어 분해능 48.356 mV(12 bit)를 얻었다.

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