• 전기전자학회논문지
• /
• 제26권2호
• /
• pp.306-312
• /
• 2022

서로 다른 PN 비율과 금속화 어닐링 온도에 의해 장벽 높이가 다른 4H-SiC 병합 PiN Schottky(MPS) 다이오드의 전기적 특성과 심층 트랩을 조사했다. MPS 다이오드의 장벽 높이는 IV 및 CV 특성에서 얻었다. 전위장벽 높이가 낮아짐에 따라 누설 전류가 증가하여 10배의 전류가 발생하였다. 또한, 심층 트랩(Z_1/2 및 RD_1/2)은 4개의 MPS 다이오드에서 DLTS 측정을 통해 밝혀졌다. DLTS 결과를 기반으로, 트랩 에너지 준위는 낮은 장벽 높이와 함께 22~28%의 얕은 수준으로 확인되었다. 이는 쇼트키 장벽 높이에 대해 DLTS에 의해 결정된 결함 수준 및 농도의 의존성을 확인할 수 있다.

• 전자공학회논문지
• /
• 제54권1호
• /
• pp.21-25
• /
• 2017

본 연구에서는 최근 차세대 전력 반도체로 관심을 받고 있는 단결정 ${\beta}-Ga_2O_3$를 이용한 쇼트키 배리어 다이오드 제작 및 특성 분석을 수행하였다. 쇼트키 배리어 다이오드는 Sn으로 도핑된 $2{\mu}m$ 두께의 저농도 N 타입 에피층 상에 Pt/Ti/Au 쇼트키 접합으로 제작되었으며 측정된 특성은 > 180 V의 항복전압, $1.26m{\Omega}{\cdot}cm^2$의 온 저항, 그리고 1 V의 순 방향 전압에서 $77A/cm^2$, 1.5 V에서 $473A/cm^2$의 순방향 전류 특성을 나타내었다. 본 연구를 통하여 단결정 ${\beta}-Ga_2O_3$의 전력반도체 활용 가능성을 확인 할 수 있었다.

• 전기학회논문지
• /
• 제66권4호
• /
• pp.659-665
• /
• 2017

Power semiconductor devices required the low on-resistance and high breakdown voltage. Wide band-gap materials opened a new technology of the power devices which promised a thin drift layer at an identical breakdown voltage. The diamond had the wide band-gap of 5.5 eV which induced the low power loss, high breakdown capability, low intrinsic carrier generation, and high operation temperature. We investigated the p-type pseudo-vertical diamond Schottky barrier diodes using a numerical simulation. The impact ionization rate was material to calculating the breakdown voltage. We revised the impact ionization rate of the diamond for adjusting the parallel-plane breakdown field at 10 MV/cm. Effects of the field plate on the breakdown voltage was also analyzed. A conventional diamond Schottky barrier diode without field plate exhibited the high forward current of 0.52 A/mm and low on-resistance of $1.71{\Omega}-mm$ at the forward voltage of 2 V. The simulated breakdown field of the conventional device was 13.3 MV/cm. The breakdown voltage of the conventional device and proposed devices with the $SiO_2$ passivation layer, anode field plate (AFP), and cathode field plate (CFP) was 680, 810, 810, and 1020 V, respectively. The AFP cannot alleviate the concentration of the electric field at the cathode edge. The CFP increased the breakdown voltage with evidences of the electric field and potential. However, we should consider the dielectric breakdown because the ideal breakdown field of the diamond is higher than that of the $SiO_2$, which is widely used as the passivation layer. The real breakdown voltage of the device with CFP decreased from 1020 to 565 V due to the dielectric breakdown.

• 한국전기전자재료학회논문지
• /
• 제23권8호
• /
• pp.587-592
• /
• 2010

We have fabricated schottky barrier diode (SBDs) using polar (c-plane) and non polar (a-, m-plane) n-type 6H-SiC wafers. Ni/SiC ohmic contact was accomplished on the backside of the SiC wafers by thermal evaporation and annealed for 20minutes at $950^{\circ}C$ in mixture gas ($N_2$ 90% + $H_2$ balanced). The specific contact resistance was $3.6{\times}10^{-4}{\Omega}cm^2$ after annealing at $950^{\circ}C$. The XRD results of the alloyed contact layer show that formation of $NiSi_2$ layer might be responsible for the ohmic contact. The active rectifying electrode was formed by the same thermal evaporation of Ni thin film on topside of the SiC wafers and annealed for 5 minutes at $500^{\circ}C$ in mixture gas ($N_2$ 90% + $H_2$ balanced). The electrical properties of SBDs have been characterized by means of I-V and C-V curves. The forward voltage drop is about 0.95 V, 0.8 V and 0.8 V for c-, a- and m-plane SiC SBDs respectively. The ideality factor (${\eta}$) of all SBDs have been calculated from log(I)-V plot. The values of ideality factor were 1.46, 1.46 and 1.61 for c-, a- and m-plane SiC SBDs, respectively. The schottky barrier height (SBH) of all SBDs have been calculated from C-V curve. The values of SBH were 1.37 eV, 1.09 eV and 1.02 eV for c-, a- and m-plane SiC SBDs, respectively.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 1999년도 춘계학술대회 논문집
• /
• pp.30-33
• /
• 1999

본 연구에서는 Pt/f4-SiC Schottky barrier diodes(SBDs)의 소자 성능향상과 미세구조와의 상관관계를 규명하였다. 다른 열처리 온도구간에 따른 금속/SiC 계면의 미세구조 평가는 X-ray scattering법을 사용하여 분석하였다. 소자의 역 방향 특성은 열처리 온도가 증가함에 따라 저하되었다. As-deposited와 $850^{\circ}C$ 온도에서 열처리된 소자의 최대 항복전압은 각각 1300 V와 626 V 이었다. 그러나, 소자의 순방향 특성은 열처리 온도가 증가함에 따라 향상되었다. X-ray scattering법으로 >$650^{\circ}C$ 이상의 열처리 온도에서는 Pt/SiC 계면에서 Pt-silicides가 형성되었고, 이러한 Silicides의 형성이 Pt/SiC 계면의 평활도를 증가시킨 원인이 됨을 보였다. SBDs의 순방향 특성은 열처리 과정동안 Pt/SiC 계면에서 형성된 silicides의 결정성에 강하게 의존함을 알 수 있었다.

• 한국전기전자재료학회논문지
• /
• 제16권6호
• /
• pp.471-476
• /
• 2003

Au/oxide/n-InP Schottky diodes were fabricated from heteroepitaxial InP layers grown on GaAs substrates by the metalorganic vapor phase epitaxy (MOVPE) method from a new combination of source materials: ethyldimethylindium (EDMIn) and tertiarybutylphosphine (TBP). Anodic oxidation technique by using a solution of 10 g of ammonium pentaborate in 100 cc of ethylene glycole as the electrolyte was used to deposit a thin oxide layer. The barrier heights determined from three different techniques, current-voltage (I-V) measurements at room temperature and in the temperature range of 273 K - 373 K, and room temperature capacitance-voltage (C-V) measurements are in good agreement, 0.7 - 0.9 eV which is considerably high as compared to the 0.45 - 0.55 eV in Au/n-InP Schottky diode without a Passivation layer. The ideality factors of 1.1 - 1.3 of the Schottky diodes were also determined from the I-Y characteristics. Deep level transient spectroscopy (DLTS) studies revealed only one shallow electron state at 92.6 meV below the bottom of the conduction band and no deep state in the heteroepitaxial InP layers grown from EDMIn and TBP.

• 전기전자학회논문지
• /
• 제21권1호
• /
• pp.73-76
• /
• 2017

실리콘카바이드 소자는 넓은 밴드갭을 갖는 물질로서 많은 주목을 받아왔다. 특히 4H-SiC 쇼트키 배리어 다이오드는 빠른 스위칭 속도와 낮은 순방향 전압강하의 특성으로 인해 널리 사용되고 있다. 그러나 쇼트키 배리어 다이오드의 낮은 신뢰성으로 인한 문제로 대안인 Super Barrier Rectifier(SBR)가 연구되었다. 본 논문은 4H-SiC trench-type accumulation super barrier rectifier(TASBR)를 분석하고 제안한다. 2D 시뮬레이션을 통해 본 구조는 심각한 역방향 저지전압의 감소와 누설전류의 증가가 없는 동시에 순방향 전압 강하는 21.06% 향상됨을 확인 할 수 있었다. 이러한 새로운 정류기 구조를 이용하면 전력손실이 적은 애플리케이션을 기대할 수 있다.

• 대한전자공학회논문지
• /
• 제23권5호
• /
• pp.712-718
• /
• 1986

A shallow n+ layer of implanted phosphorus was used to lower the barrier height of PtSinSi schottky diodes. The reduction of barrier height of the forward turn-on voltages from 400mV to 180mV of the forward was followed by implantation of phosphorus at 35KeV with an ion dose of 8.0x10**12 atoms/cm\ulcornerand was activated at 925\ulcorner for 30min in dry O2. The test result showed that, as the ion-implanted dose increased, the forward turn-on voltage and reverse breakdown voltage were linearly decreased, but the saturation current and ideality factor(n) were linearly increased.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2004년도 제27회 학술발표회 초록집
• /
• pp.165-165
• /
• 2004

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
• /
• pp.191-192
• /
• 2005

The reverse breakdown voltages of 4H-SiC SBD(schottky barrier diode)s with FP(Field Plate) and/or FLR(Field Limiting Ring) as a edge termination, were investigated. The breakdown voltages of SBDs with FP ware investigated varying the overlap width from $1{\mu}m$ to $30{\mu}m$. The maximum average breakdown voltages was 475V. There is no significant changes for the devices with overlap width of between $5{\mu}m\sim30{\mu}m$. It was confirmed that the dielectric breakdown of the thin thermal oxide is main cause of device failure. However, the breakdown voltage of SBD with FLR was 1400V even though the FLR edge termination structure was not optimized.