• Journal of Information Processing Systems
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• v.15 no.4
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• pp.890-903
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• 2019

The single carrier frequency domain equalization (SC-FDE) technology is an important part of the broadband wireless access communication system, which can effectively combat the frequency selective fading in the wireless channel. In SC-FDE communication system, the accuracy of timing synchronization directly affects the performance of the SC-FDE system. In this paper, on the basis of Schmidl timing synchronization algorithm a timing synchronization algorithm suitable for FPGA (field programmable gate array) implementation is proposed. In the FPGA implementation of the timing synchronization algorithm, the sliding window accumulation, quantization processing and amplitude reduction techniques are adopted to reduce the complexity in the implementation of FPGA. The simulation results show that the algorithm can effectively realize the timing synchronization function under the condition of reducing computational complexity and hardware overhead.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.18 no.5
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• pp.1412-1430
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• 2024

The soft cancellation list (SCANL) decoding algorithm for polar codes runs L soft cancellation (SCAN) decoders with different decoding factor graphs. Although it can achieve better decoding performance than SCAN algorithm, it has high latency. In this paper, a fast simplified SCANL (Fast-SSCANL) algorithm that runs L independent Fast-SSCAN decoders is proposed. In Fast-SSCANL decoder, special nodes in each factor graph is identified, and corresponding low-latency decoding approaches for each special node is propose first. Then, syndrome check aided Fast-SSCANL (SC-Fast-SSCANL) algorithm is further put forward. The ordinary nodes satisfied the syndrome check will execute hard decision directly without traversing the factor graph, thereby reducing the decoding latency further. Simulation results show that Fast-SSCANL and SC-Fast-SSCANL algorithms can achieve the same BER performance as the SCANL algorithm with lower latency. Fast-SSCANL algorithm can reduce latency by more than 83% compared with SCANL, and SC-Fast-SSCANL algorithm can reduce more than 85% latency compared with SCANL regardless of code length and code rate.

• IE interfaces
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• v.12 no.1
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• pp.94-101
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• 1999

The set covering(SC) problem is the problem of covering all the rows of an $m{\times}n$ matrix of ones and zeros by a subset of columns with a minimal cost. It has many practical applications of modeling of real world problems. The SC problem has been proven to be NP-complete and many algorithms have been presented to solve the SC problem. In this paper we present hybrid simulated annealing(HSA) algorithm based on the Simulated Annealing(SA) for the SC problem. The HSA is an algorithm which combines SA with a crossover operation in a genetic algorithm and a local search method. Our experimental results show that the HSA obtains better results than SA does.

• Journal of Korea Society of Industrial Information Systems
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• v.24 no.3
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• pp.31-38
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• 2019

In this paper, we design a green supply chain (gSC) network model. For constructing the gSC network model, environmental and economic factors are taken into consideration in it. Environmental factor is to minimize the $CO_2$ emission amount emitted when transporting products or materials between each stage. For economic factor, the total cost which is composed of total transportation cost, total handling cost and total fixed cost is minimized. To minimize the environmental and economic factors simultaneously, a mathematical formulation is proposed and it is implemented in a genetic algorithm (GA) approach. In numerical experiment, some scales of the gSC network model is presented and its performance is analyzed using the GA approach. Finally, the efficiencies of the gSC network model and the GA approach are proved.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.9
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• pp.1892-1897
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• 2012

In this paper, efficient CNU(Check Node Update) algorithms are analyzed for high speed LDPC decoding in DVB-S2 standard. In aspect to CNU methods, there are some kinds of CNU methods. Among of them, MP (Min Product) method is quite often used in LDPC decoding. However MP needs LUT (Look Up Table) that is critical path in LDPC decoding speed. A new SC-NMS (Self-Corrected Normalized Min-Sum) method is proposed in the paper. NMS needs only normalized scaling factor instead of LUT and compensates the overestimation of MP approximation. In addition, SC method is proposed. It gives a faster convergence toward a decoded codeword. If a message change its sign between two iterations, it is not reliable and to avoid to propagate noisy information, its module is set to 0. The performance of SC-NMS has a little degrade compare to MP by 0.1 dB, however considering computational complexity and decoding speed, SC-NMS algorithm is optimal method for CNU algorithm.

• The KIPS Transactions:PartC
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• v.16C no.2
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• pp.267-274
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• 2009

For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. There are two methods of anti-collision algorithms for the identification of multiple tags, conclusive algorithms based on tree and stochastic algorithms based on slotted ALOHA. In this paper, we propose a Dynamic Framed Slotted ALOHA-Slot Congestion(DFSA-SC) Algorithm. The proposed algorithm improves the efficiency of collision resolution. The performance of the proposed DFSA-SC algorithm is showed by simulation. The identification time of the proposed algorithm is shorter than that of the existing DFSA algorithm. Furthermore, when the bit duplication of the tagID is higher, the proposed algorithm is more efficient than Query Tree algorithm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.4
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• pp.399-407
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• 2010

SC-FDMA system uses DFT-spreading method for reducing the PAPR of OFDM signal, which improves the power efficiency. Block type pilot is used in SC-FDMA system. However, there are ICI due to the inevitable phase noise and frequency offset that can be generated from the Doppler frequency and inaccuracy between the transceiver oscillators. This ICI definitely degrades the BER performance. To overcome this problem and estimate the channel efficiently, we like to propose ICI compensation algorithm for the SC-FDMA system with comb type pilot. SLM method is additionally included for the PAPR reduction when pilot is assigned in comb type. Finally, it is confirmed that the ICI due to the phase noise and frequency offset is efficiently compensated by the suggested algorithm.

• Journal of Information Processing Systems
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• v.16 no.4
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• pp.870-881
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• 2020

Because SCADA monitoring data of wind turbines are large and fast changing, the unbalanced proportion of data in various working conditions makes it difficult to process fault feature data. The existing methods mainly introduce new and non-repeating instances by interpolating adjacent minority samples. In order to overcome the shortcomings of these methods which does not consider boundary conditions in balancing data, an improved over-sampling balancing algorithm SC-SMOTE (safe circle synthetic minority oversampling technology) is proposed to optimize data sets. Then, for the balanced data sets, a fault diagnosis method based on improved k-nearest neighbors (kNN) classification for wind turbine blade icing is adopted. Compared with the SMOTE algorithm, the experimental results show that the method is effective in the diagnosis of fan blade icing fault and improves the accuracy of diagnosis.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.550-556
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• 2016

Polar codes are one of the most favorable capacity-achieving codes due to their simple structure and low decoding complexity. However, because of the disappointing decoding performance realized using conventional successive cancellation (SC) decoders, polar codes cannot be used directly in practical applications. In contrast to conventional SC decoders, list SC (SCL) decoders with large list sizes (e.g. 32) achieve performances very close to those of maximum-likelihood (ML) decoders. In SCL decoders with large list sizes, however, hardware increase is a severe problem because an SCL decoder with list size L consists of L copies of an SC decoder. In this paper, we present a low-area SCL decoder architecture that applies the proposed merged processing element-sharing (MPES) algorithm. A merged processing element (MPE) is the basic processing unit in SC decoders, and the required number of MPEs is L(N-1) in conventional SCL decoders. Using the proposed algorithm reduces the number of MPEs by about 70% compared with conventional SCL decoders when the list size is larger than 32.

• KIEE International Transactions on Power Engineering
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• v.4A no.4
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• pp.207-213
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• 2004

In this paper, the on-line volt/var control algorithms of the Load Tap Changer (LTC) transformer and Shunt Capacitor (SC) are proposed for distribution volt/var compensation. In the existing volt/var control of the distribution substation, the feeder voltage and reactive power demand of the distribution are mainly controlled by the LTC transformer tap position and on/off operation of the Sc. It is very difficult to maintain volt/var at the distribution networks within the satisfactory levels due to the discrete operation characteristics of the LTC and SC. In addition, there is the limitation of the LTC and SC operation times, which affects their functional lifetimes. The proposed volt/var control algorithm determines an optimal tap position of the LTC and on/off status of the SC at a distribution substation with multiple connected feeders. The mathematical equations of the proposed method are introduced. A simple case study is performed to verify the effectiveness of the proposed method.