• Title/Summary/Keyword: Running loop

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Static Timing Analysis Tool for ARM-based Embedded Software (ARM용 내장형 소프트웨어의 정적인 수행시간 분석 도구)

  • Hwang Yo-Seop;Ahn Seong-Yong;Shim Jea-Hong;Lee Jeong-A
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.15-25
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    • 2005
  • Embedded systems have a set of tasks to execute. These tasks can be implemented either on application specific hardware or as software running on a specific processor. The design of an embedded system involves the selection of hardware software resources, Partition of tasks into hardware and software, and performance evaluation. An accurate estimation of execution time for extreme cases (best and worst case) is important for hardware/software codesign. A tighter estimation of the execution time bound nay allow the use of a slower processor to execute the code and may help lower the system cost. In this paper, we consider an ARM-based embedded system and developed a tool to estimate the tight boundary of execution time of a task with loop bounds and any additional program path information. The tool we developed is based on an exiting timing analysis tool named 'Cinderella' which currently supports i960 and m68k architectures. We add a module to handle ARM ELF object file, which extracts control flow and debugging information, and a module to handle ARM instruction set so that the new tool can support ARM processor. We validate the tool by comparing the estimated bound of execution time with the run-time execution time measured by ARMulator for a selected bechmark programs.

GNSS Software Receivers: Sampling and jitter considerations for multiple signals

  • Amin, Bilal;Dempster, Andrew G.
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.385-390
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    • 2006
  • This paper examines the sampling and jitter specifications and considerations for Global Navigation Satellite Systems (GNSS) software receivers. Software radio (SWR) technologies are being used in the implementation of communication receivers in general and GNSS receivers in particular. With the advent of new GPS signals, and a range of new Galileo and GLONASS signals soon becoming available, GNSS is an application where SWR and software-defined radio (SDR) are likely to have an impact. The sampling process is critical for SWR receivers, where it occurs as close to the antenna as possible. One way to achieve this is by BandPass Sampling (BPS), which is an undersampling technique that exploits aliasing to perform downconversion. BPS enables removal of the IF stage in the radio receiver. The sampling frequency is a very important factor since it influences both receiver performance and implementation efficiency. However, the design of BPS can result in degradation of Signal-to-Noise Ratio (SNR) due to the out-of-band noise being aliased. Important to the specification of both the ADC and its clocking Phase- Locked Loop (PLL) is jitter. Contributing to the system jitter are the aperture jitter of the sample-and-hold switch at the input of ADC and the sampling-clock jitter. Aperture jitter effects have usually been modeled as additive noise, based on a sinusoidal input signal, and limits the achievable Signal-to-Noise Ratio (SNR). Jitter in the sampled signal has several sources: phase noise in the Voltage-Controlled Oscillator (VCO) within the sampling PLL, jitter introduced by variations in the period of the frequency divider used in the sampling PLL and cross-talk from the lock line running parallel to signal lines. Jitter in the sampling process directly acts to degrade the noise floor and selectivity of receiver. Choosing an appropriate VCO for a SWR system is not as simple as finding one with right oscillator frequency. Similarly, it is important to specify the right jitter performance for the ADC. In this paper, the allowable sampling frequencies are calculated and analyzed for the multiple frequency BPS software radio GNSS receivers. The SNR degradation due to jitter in a BPSK system is calculated and required jitter standard deviation allowable for each GNSS band of interest is evaluated. Furthermore, in this paper we have investigated the sources of jitter and a basic jitter budget is calculated that could assist in the design of multiple frequency SWR GNSS receivers. We examine different ADCs and PLLs available in the market and compare known performance with the calculated budget. The results obtained are therefore directly applicable to SWR GNSS receiver design.

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Design Considerations on the Standby Cooling System for the integrity of the CNS-IPA

  • Choi, Jungwoon;Kim, Young-ki
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.104-104
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    • 2015
  • Due to the demand of the cold neutron flux in the neutron science and beam utilization technology, the cold neutron source (CNS) has been constructed and operating in the nuclear research reactor all over the world. The majority of the heat load removal scheme in the CNS is two-phase thermosiphon using the liquid hydrogen as a moderator. The CNS moderates thermal neutrons through a cryogenic moderator, liquid hydrogen, into cold neutrons with the generation of the nuclear heat load. The liquid hydrogen in a moderator cell is evaporated for the removal of the generated heat load from the neutron moderation and flows upward into a heat exchanger, where the hydrogen gas is liquefied by the cryogenic helium gas supplied from a helium refrigeration system. The liquefied hydrogen flows down to the moderator cell. To keep the required liquid hydrogen stable in the moderator cell, the CNS consists of an in-pool assembly (IPA) connected with the hydrogen system to handle the required hydrogen gas, the vacuum system to create the thermal insulation, and the helium refrigeration system to provide the cooling capacity. If one of systems is running out of order, the operating research reactor shall be tripped because the integrity of the CNS-IPA is not secured under the full power operation of the reactor. To prevent unscheduled reactor shutdown during a long time because the research reactor has been operating with the multi-purposes, the introduction of the standby cooling system (STS) can be a solution. In this presentation, the design considerations are considered how to design the STS satisfied with the following objectives: (a) to keep the moderator cell less than 350 K during the full power operation of the reactor under loss of the vacuum, loss of the cooling power, loss of common electrical power, or loss of instrument air cases; (b) to circulate smoothly helium gas in the STS circulation loop; (c) to re-start-up the reactor within 1 hour after its trip to avoid the Xenon build-up because more than certain concentration of Xenon makes that the reactor cannot start-up again; (d) to minimize the possibility of the hydrogen-oxygen reaction in the hydrogen boundary.

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A Comparative Study of PRAM-based Join Algorithms (PRAM 기반의 조인 알고리즘 성능 비교 연구)

  • Choi, Yongsung;On, Byung-Won;Choi, Gyu Sang;Lee, Ingyu
    • Journal of KIISE
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    • v.42 no.3
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    • pp.379-389
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    • 2015
  • With the advent of non-volatile memories such as Phase Change Memory (PCM or PRAM) and Magneto Resistive RAM (MRAM), active studies have been carried out on how to replace Dynamic Random-Access Memory (DRAM) with PRAM. In this paper, we study both endurance and performance issues of existing join algorithms that are based on PRAM-based computer systems and have been widely used until now: Block Nested Loop Join, Sort-Merge Join, Grace Hash Join, and Hybrid Hash Join. Our experimental results show that the existing join algorithms need to be redesigned to improve both the endurance and performance of PRAMs. To the best of our knowledge, this is the first research to scientifically study the results of the four join algorithms running on PRAM-based systems. In this work, our main contribution is the modeling and implementation of a PRAM-based simulator for a comparative study of the existing join algorithms.

Memory data layout and DMA transfer technique research For efficient data transfer of CNN accelerator (CNN 가속기의 효율적인 데이터 전송을 위한 메모리 데이터 레이아웃 및 DMA 전송기법 연구)

  • Cho, Seok-Jae;Park, Sungkyung;Park, Chester Sungchung
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.559-569
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    • 2020
  • One of the deep-running algorithms, CNN's artificial intelligence application uses off-chip memory to store data on the Convolution Layer. DMA can reduce processor load at every data transfer. It can also reduce application performance degradation by varying the order in which data from the Convolution layer is transmitted to the global buffer of the accelerator. For basic layouts with continuous memory addresses, SG-DMA showed about 3.4 times performance improvement in pre-setting DMA compared to using ordinaly DMA, and for Ideal layouts with discontinuous memory addresses, the ordinal DMA was about 1396 cycles faster than SG-DMA. Experiments have shown that a combination of memory data layout and DMA can reduce the DMA preset load by about 86 percent.

STUDY ON THE PREVENTION METHOD FOR HEAT ACCUMULATION FOR PERSONAL RAPID TRANSIT (PRT) VEHICLE UNDER BODY (PRT 차량하부 열부하 저감방안 도출 연구)

  • Kwon, S.B.;Song, J.H.;Kang, S.W.;Jeong, R.G.;Kim, H.B.;Lee, C.H.;Seo, D.K.
    • Journal of computational fluids engineering
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    • v.18 no.1
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    • pp.58-62
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    • 2013
  • Personal Rapid Transit (PRT) is the emerging personal transport vehicle operating on the loop automatically. The PRT system utilize the electrical power from super capacity or battery, it is important to manage the power or energy. In this regards, the management of high temperature occurred by the operation of system is significantly important to prevent from serious damage of component. In this study, we studied the adequate shape of underbody which can reduce the heat accumulation by pickup coil and condenser using natural air cooling. We suggested the additional air pathway, air inlet and flow separator to decrease the temperature of the heat source components. It was found that suggested system can decrease the temperature of PRT under body by 16% during the static mode and by 10% during the running mode at 30km/h. It is expected that the findings of this study will feed into final design of newly built Korean PRT vehicle.

Performance Evaluation for Several Control Algorithms of the Actuating System Using G/C HILS Technique (비행 전구간 유도제어 HILS 기법을 적용한 구동제어 알고리즘 성능 평가 연구)

  • Jeon, Wan Soo;Cho, Hyeon Jin;Lee, Man Hyung
    • Journal of the Korean Society for Precision Engineering
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    • v.13 no.9
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    • pp.114-129
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    • 1996
  • This paper describes the whole development phase for the underwater vehicle actuating system with high hydroload torque disturbance. This includes requirement analysis, system modeling, control algorithm design, real time implementation, test and performance evaluations. As for driving control algorithms, fuzzy logic, variable structure and PD(Proportional-Differential) algorithm were designed and implemented on board controller using a single chip microprocessor. Intel 8797. And test and performance evaluation is carried out both single test and wystem integration test. We could confirm the basic performance of actuating system through the single test and gereral developing work of any actuating systems was finished with a single performance test of actuating system without system integration test. But, we suggested that system integration test be needed. System integration test is carried out using G/C HILS(Guidance and Control Hardware-In-the -Loop Simulation) which is constituted flight motion simulator, load simulator, real time host computer and the related subsystems such as inertial navigation system, power supply system and Guidance and Control Computer etc.. The most important practical contribution of this paper is that full system characteristics such as minimal control effort, enhancement of guidance and autopilot performance by the actuating system using G/C HILS technique are investigated. Through full running G/C HILS, in spite of the passing to single tests, some control algorithm resulted in failure as to stability of full system and system time frame.

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High Temperature Application of Iron Removal Chemical Cleaning Solvent in the Secondary Side of Nuclear Steam Generators (증기발생기 2차측 제철화학세정액의 고온적용)

  • Hur, D.H.;Lee, E.H.;Chung, H.S.;Kim, U.C.
    • Nuclear Engineering and Technology
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    • v.26 no.1
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    • pp.140-148
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    • 1994
  • A qualification test was performed for the iron removal chemical cleaning of the secondary side of nuclear steam generators at the selected temperature, 1$25^{\circ}C$, higher than the standard application temperature, 93$^{\circ}C$. The field cleaning condition for a nuclear unit was tested in a bench scale test loop including a SUS 316 stainless steel autoclave with one gallon capacity as a test vessel. The kinetics of sludge dissolution, corrosion of the secondary side materials and change of solvent chemistry were monitored. Test results indicated that more thorough cleaning was accomplished in less than half of the cleaning time required at 93$^{\circ}C$. And the total corrosions of the secondary side materials were found to be less than the values at 93$^{\circ}C$. While the solvent is recirculated and heated by an external chemical cleaning equipment for the conventional 93$^{\circ}C$ process, the secondary side is heated by the lateral heat of the primary coolant without the recirculation of the cleaning solution, and the solvent is mixed by vigorous boiling induced by periodic ventilation for the high temperature process. The requirement that the reactor coolant pumps should be running during the cleaning operation is the major disadvantage of the high temperature process which also should be considered when chemical cleaning is planned for steam generators under operation.

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From a Defecation Alert System to a Smart Bottle: Understanding Lean Startup Methodology from the Case of Startup "L" (배변알리미에서 스마트바틀 출시까지: 스타트업 L사 사례로 본 린 스타트업 실천방안)

  • Sunkyung Park;Ju-Young Park
    • Asia-Pacific Journal of Business Venturing and Entrepreneurship
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    • v.18 no.5
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    • pp.91-107
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    • 2023
  • Lean startup is a concept that combines the words "lean," meaning an efficient way of running a business, and "startup," meaning a new business. It is often cited as a strategy for minimizing failure in early-stage businesses, especially in software-based startups. By scrutinizing the case of a startup L, this study suggests that lean startup methodology(LSM) can be useful for hardware and manufacturing companies and identifies ways for early startups to successfully implement LSM. To this end, the study explained the core of LSM including the concepts of hypothesis-driven approach, BML feedback loop, minimum viable product(MVP), and pivot. Five criteria to evaluate the successful implementation of LSM were derived from the core concepts and applied to evaluate the case of startup L . The early startup L pivoted its main business model from defecation alert system for patients with limited mobility to one for infants or toddlers, and finally to a smart bottle for infants. In developing the former two products, analyzed from LSM's perspective, company L neither established a specific customer value proposition for its startup idea and nor verified it through MVP experiment, thus failed to create a BML feedback loop. However, through two rounds of pivots, startup L discovered new target customers and customer needs, and was able to establish a successful business model by repeatedly experimenting with MVPs with minimal effort and time. In other words, Company L's case shows that it is essential to go through the customer-market validation stage at the beginning of the business, and that it should be done through an MVP method that does not waste the startup's time and resources. It also shows that it is necessary to abandon and pivot a product or service that customers do not want, even if it is technically superior and functionally complete. Lastly, the study proves that the lean startup methodology is not limited to the software industry, but can also be applied to technology-based hardware industry. The findings of this study can be used as guidelines and methodologies for early-stage companies to minimize failures and to accelerate the process of establishing a business model, scaling up, and going global.

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