• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2004.05a
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• pp.63-66
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• 2004

The responses of hypothetical silicon nanotubes under torsion have been investigated using an atomistic simulation based on the Tersoff potential. A torque, proportional to the deformation within Hooke's law, resulted in the ribbon-like flattened shapes and eventually led to a breaking of hypothetical silicon nanotubes. Each shape change of hypothetical silicon nanotubes corresponded to an abrupt energy change and a singularity in the strain energy curve as a function of the external tangential force, torque, or twisted angle. The dynamics of silicon nanotubes under torsion can be modelled in the continuum elasticity theory.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.68-68
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• 2010

To reduce PV manufacturing costs, the thickness of solar cell is getting thinner. Bow is shown after cooling down the temperature of solder cell. It happens because of different thermal expansion coefficients of different metals. Bowed cell can make micro crack while module processing and it can drop off efficiency of PV module. As thinner solar cell is produced, the thickness of ribbon should be concerned to prevent extra bow. In this paper we investigate the contrast of deflection when we solder different thickness of ribbons on same solar cell. This approach would help to find out the optical thickness of ribbon for particular thickness of solar cell later on.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.412-414
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• 2004

We have developed nucleation control methods applicable to a zone-melting recrystallization excimer laser annealing process for poly-Si films. Ribbon-shaped Si grains of 2 ${\mu}m$-width were successfully aligned side by side by means of a comb-shaped beam, and we have successfully fabricated TFTs with channels formed in those grains. Electron mobility in the TFTs is as high as 677-$cm^2$/Vs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.33-33
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• 2009

Silicon nano-structures have great potential in bionic sensor applications. Atomic force microscopy (AFM) anodic oxidation have many advantages for the nanostructure fabrication, such as simple process in atmosphere at room temperature, compatibility with conventional Si process. In this work, we fabricated simple FET structures with channel width W~ 10nm (nanowire) and $1{\mu}m$ (nano-ribbon) on ~10, 20 and 100nm-thinned silicon-on-insulator (SOI) wafers in order to investigate the surface effect on the transport characteristics of nano-channel. For further quantitative analysis, we carried out the 2D numerical simulations to investigate the effect of channel surface states on the carrier distribution behavior inside the channel. The simulated 2D cross-sectional structures of fabricated devices had channel heights of H ~ 10, 20, and 100nm, widths of L ~ $1{\mu}m$ and 10nm respectively, where we simultaneously varied the channel surface charge density from $1{\times}10^{-9}$ to $1{\times}10^{-7}C/cm2$. It has been shown that the side-wall charge of nanowire channel mainly affect the I-V characteristics and this was confirmed by the 2D numerical simulations.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.3
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• pp.317-321
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• 2003

A conventional typewriter types letters by hammering a carbon ribbon which is attached at a paper. The laser typing process which write a micro pattern of Chrome on a silicon wafer has been developed. A glass that is coated with 100 nm Chrome (Carbon ribbon) is attached on a silicon wafer (paper). An Nd-Yag laser (hammer) is irradiated on the glass, and the Chrome is transferred on the silicon wafer. Micro patterns are made by controlling laser beam trajectory. The suggested micro pattering can be used at the high density data storage of TeraBit/in$^2$ or at the improvement of productivity of semiconductor manufacturing procedure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.3
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• pp.240-244
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• 2011

The high cost of crystalline silicon solar cells has been considered as one of the major obstacles to their terrestrial applications. Spin on doping (SOD) is presented as a useful process for the manufacturing of low cost solar cells. Phosphorus (P509) was used as an n-type emitters of solar cells. N-type emitters were formed on p-type EFG ribbon Si wafers by using a SOD at different spin speed (1,000~4,000 rpm), diffusion temperatures ($800^{\circ}C{\sim}950^{\circ}C$), and diffusion time (5~30 min) in $N_2+O_2$ atmosphere. With optimum condition, we were able to achieve cell efficiency of 14.1%.

• Journal of Energy Engineering
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• v.22 no.4
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• pp.333-337
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• 2013

본 논문에서는 태양전지의 Ribbon 두께(A-type:0.2mm, B-type:0.25mm)에 따라 3가지 온도조건 ($-40{\sim}65^{\circ}C$, $-40{\sim}85^{\circ}C$, $-40{\sim}105^{\circ}C$)으로 열충격 시험을 수행하였다. 그 결과, A, B type 별 초기 평균효율은 15.2%로 같았다. 하지만, 열충격 시험(600 Cycle) 후 Condition 1에서 A-type 7.5%, B-type 7.7%, Condition 2에서는 8.6%, 13.2%를 나타내었다. Condition 3에서는 각각 11.6%, 19.9%의 감소율을 나타내었다. 열충격 시험 후 A-type보다 Ribbon두께가 두꺼운 B-type의 효율이 크게 감소하였다. 이는 A, B type 모두 이종재료 접합부의 금속간화합물(IMC)층이 형성되어 전기적 저항이 증대된 것으로 판단된다. 또한, B-type의 I-V 특성 곡선 및 EL을 분석한 결과, p-n층이 파괴되고, 병렬저항이 감소하여, 장기적 신뢰성에서 A-type 보다 더 취약한 것으로 나타났다. 향후 태양전지 Ribbon 형상에 따른 장기 신뢰성 특성에 대해 수치해석 및 시뮬레이션 분석이 수반되어야 할 것이다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12S
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• pp.1165-1174
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• 2003

The responses of hypothetical silicon nanotubes under torsion have been investigated using an atomistic simulation based on the Tersoff potential. A torque, proportional to the deformation within Hooke's law, resulted in the ribbon-like flattened shapes and eventually led to a breaking of hypothetical silicon nanotubes. Each shape change of hypothetical silicon nanotubcs corresponded to an abrupt energy change and a singularity in the strain energy curve as a function of the external tangential force, torque, or twisted angle. The dynamics o silicon nanotubes under torsion can be modelled in the continuum elasticity theory.

• Journal of Welding and Joining
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• v.32 no.6
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• pp.75-81
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• 2014

Usage of heavy metal element (Pb, Hg and Cd etc.) in electronic devices have been restricted due to the environmental banning of the European Union, such as WEEE and RoHS. Therefore, it is needed to develop the Pb-free solder plated ribbon in photovoltaic (PV) module. This study described that degradation characteristics of PV module under damp heat (DH, $85^{\circ}C$ and 85% R.H.) condition test for 1,000 h. Solar cell ribbons were utilized to hot dipping plate with Pb-free solder alloys. Two types of Pb-free solder plated ribbons, Sn-3.0Ag-0.5Cu (SAC305) and Sn-48Bi-2Ag, and an electroless Sn-40Pb solder hot dipping plated ribbon as a reference sample were prepared to evaluate degradation characteristics. To detect the degradation of PV module with the eutectic and Pb-free solder plated ribbons, I-V curve, electro-luminescence (EL) and cross-sectional SEM analysis were carried out. DH test results show that the reason of maximum power (Pm) drop was mainly due to the decrease fill factor (FF). It was attributed to the crack or oxidation of interface between the cell and the ribbon. Among PV modules with the eutectic and Pb-free solder plated ribbon, the PV module with SAC305 ribbon relatively showed higher stability after DH test than the case of PV module with Sn-40Pb and Sn-48Bi-2Ag solder plated ribbons.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.374-374
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• 2012

반도체 소자의 크기가 100 nm 이하로 감소되면 통상적인 이온 주입 조건인 이온 에너지, 조사량 및 이온 주입 각도뿐만 아니라 Dose Rate 및 모재 온도가 Dopant Profile을 조절하는 데에 있어서 매우 중요한 인자로 작용한다. 본 연구에서는 Ribbon-beam 및 Spot-beam을 사용하여 활성화 열처리 후 Dopant Profile을 분석하였다. 이온 주입은 모든 시편에서 $BF_2$를 가속 에너지 10 keV 및 조사량 $2{\times}10^{15}/cm^2$로 고정하였다. 이온 주입 후 도펀트 활성화는 100% 질소 분위기 하에서 $850^{\circ}C$-30s 조건으로 RTA 열처리를 수행하였다. Boron 및 Fluorine의 Profile은 SIMS 분석을 통하여 구하였다. Spot-beam은 Ribbon-Beam에 비하여 Dose Rate 및 Cooling Efficiency가 높기 때문에 이온 주입 후 더욱 많은 양의 Primary-defect를 발생시키고 이에 따라 두꺼운 비정질 충을 형성한다. $BF_2$ 이온 주입 된 시편에서 B 및 F의 농도 Peak-height는 a/c 계면에 위치하는 것을 관찰하였다. 또한 B 및 F의 농도 Peak-height는 Silicon 모재의 온도가 증가할수록 증가하는 것을 관찰하였다. Silicon 모재의 온도가 증가함에 따라 Active-area의 면저항이 변화하지 않는 상태에서 Vt (Threshold Voltage)가 급격히 감소함을 관찰 하였다. 비정칠 층의 두께가 증가할수록 a/c 계면 하단에 잔존하는 Residual-defect의 양이 감소하고 이는 측면확산을 감소시키는 역할을 한다는 것이 관찰되었다.