• Title/Summary/Keyword: Restorer

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Development of Single-Phase DVR(Dynamic Voltage Restorer) Composed of H-Bridge Inverter and SuperCapacitor (H-브리지 인버터와 수퍼커패시터로 구성된 단상 DVR(Dynamic Voltage Restorer)의 개발)

  • Lee, Dong-Geun;Lee, Doo-Young;Yang, Seung-Chul;Bae, Byung-Yeol;Han, Byung-Moon
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.160-161
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    • 2007
  • This paper describes the development of a single-phase DVR(Dynamic voltage Restorer), which is composed of H-bridge inverter and super-capacitors. The operational feasibility was verified through computer simulations with PSCAD/EMTDC software, and experimental works with 3kVA prototype. The developed system can compensates the input voltage sag and interruption within 2ms, in which the maximum allowable duration of voltage interruption is 1.5 seconds. It can be effectively used to compensate the voltage interruption in the sensitive load, such as computer, communication equipment, automation equipment, and medical equipment. The developed system has a simple structure to be easily implemented with commercially available components and to be highly reliable in operation.

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Breeding Hybrid Rice with Good Quality and High Yield II. Combining Ability of the Cytoplasmic-Genetic Male Sterile and Restorer Lines with Backgrounds of Japonica Rice, and Heterosis for Yield and Grain Quality of the Hybrid Rices (양질 다수성 일대잡종 벼 육성 연구 II. 새로 육성된 Japonica형 웅성불임 및 임성회복계통의 조합능력과 일대잡종 벼의 잡종강세 정도 및 미질)

  • Hak-Soo SUH
    • KOREAN JOURNAL OF CROP SCIENCE
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    • v.38 no.5
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    • pp.418-424
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    • 1993
  • In order to test combining ability of the cytoplasmic-genetic male sterile(CGMS) and restorer lines with backgrounds of Korean japonica rice varieties, diallel crosses were made among the early maturing CGMS lines Sobaegbyeo A, Odaebyeo A, Gwanagbyeo A and Daeseongbyeo A, and the restorer lines Sobaegbyeo R, Odaebyeo R, Gwanagbyeo Rand Daeseongbyeo R, and among the medium maturing CGMS lines Hwajinbyeo A, Paldal A, Suwon 224 A and Iri 386 A and the restorer lines Hwajinbyeo R, Paldal R, Suwon 224 Rand Iri 386 R, and among the late maturing CGMS lines Nagdongbyeo A, Palkweng A, Hwacheongbyeo A and Milyang 97 A and the restorer lines Nagdongbyeo R, Palkweng R, H wacheongbyeo Rand Milyang 97 R. The fourty eight combinations of the hybrids, their parents and the maintainers were grown in field condition in 1992. General combining ability, relative specific combining ability and relative combining ability for yield of the CGMS and restorer lines were tested. Combining ability of the CGMS lines Odaebyeo A, Iri 386 A, Nagdongbyeo A and Palkweng A, and of the restorer lines Odaebyeo R, Hwajinbyeo R, Hwacheongbyeo Rand Palkweng R was relatively high. Heterobeltiosis for grain yield over the better parent of the early maturing hybrids ranged from -17 % to 15%, and that of the medium maturing ones from -4% to 22%, and that of the late maturing ones from -46% to 30% respectively, Standard heterosis over the standard variety of the early maturing hybrids ranged from -13 % to 12 %, and that of the medium maturing ones from 0 % to 26%, and that of the late maturing ones from -38% to 26% respectively, Positive and negative heterosis for grain yield of the hybrid rices were observed depending on cross combinations, In the positive heterosis hybrids, number of panicles per hill and number of spikelets per panicle contributed mostly to grain yield, while in the negative heterosis hybrids, spikelet fertility and 1000 grain weight were closely correlated to grain yield. Amylose content of the hybrid rices, maintainer and restorer lines was mostly lower than 20 %, and alkali digestion value was higher than 6.0. Grain appearance of the hybrids tested was similar to the korean japonica rice varieties.

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Breeding Hybrid Rice with Good Quality and High Yield I. Breeding of Cytoplasmic-Genetic Male Sterile and Restorer Lines with Backgrounds of Korean Rice Varieties (양질 다수성 일대잡종 벼 육성 연구 I. 우리나라 품종 배경의 세포질-유전자적 웅성불임 및 임성회복 계통 육성)

  • Hak-Soo SUH
    • KOREAN JOURNAL OF CROP SCIENCE
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    • v.38 no.5
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    • pp.413-417
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    • 1993
  • This study was conducted to breed various cytoplasmic genetic male sterile (CGMS) and restorer lines with backgrounds of Korean japonica rice varieties. The CGMS line BT-CMS was crossed with the restorer line AR-3. The fertile $F_1 was emasculated and crossed with the Korean japonica rice varieties of the early maturing Sobaegbyeo, Odaebyeo, Gwanagbyeo and Daeseongbyeo, and of the medium maturing Hwajinbyeo, Paldal, Suwon 224 and Iri 386, and of the late maturing Nagdongbyeo, Palkweng, Hwacheongbyeo and Milyang 97. Each of the three way cross $F_{1S} was segregated into fertile and sterile individuals. The sterile individuals in each cross were discarded and the fertile individuals were emasculated and backcrossed with the Korean japonica rice varieties. The same process was applied from BC$_1$F$_1$ to BC$_4$F$_1$ generation. In the ${BC_4}{F_1}of each cross, the male sterile individual was crossed with the recurrent Korean japonica variety which was maintainer of male sterility. The male sterile lines of ${BC_6}{F_1}were named as Sobaegbyeo R, Odaebyeo R, Gwanagbyeo R, etc. The fertile individuals homozygous in pollen fertility were selected from the ${BC_4}{F_2}generation and named as Sobaegbyeo R, Odaebyeo R, Gwanagbyeo R, etc. Agronomic characteristics of the CGMS, restorer lines with backgrounds of Korean japonica, and the recurrent Korean japonica rice varieties grown in the field condition were compared. Culm length of the CGMS lines tended to be shorter than that of the recurrent parent, however no significant differences in heading date, panicle length and yield component were found among the CGMS, restorer and recurrent lines.

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The Operation Characteristics of Ultracapacitor in Dynamic Voltage Restorer (동적전압보상장치에서의 울트라커패시터 동작 특성)

  • Kwon, Yoon-Hyeok;Kang, Jin-A;Choi, Hyo-Shin;Park, Wan-Ki
    • Proceedings of the KIEE Conference
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    • 2006.11a
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    • pp.57-59
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    • 2006
  • 에너지저장소자로 커패시터를 이용하여 순간정전 또는 순간전압강하 방지의 목적으로 사용되는 동적전압보상장치(Dynamic Voltage Restorer)에 울트라커패시터를 적용/시험하였다. 이로부터 울트라커패시터의 적용가능성을 에너지저장소자들 간의 출력특성 관점에서 비교하였다.

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Development of the Dynamic Voltage Restorer Prototype (Dynamic Voltage Restorer Prototype 개발)

  • Kim, Ji-Won;Chun, Yeong-Han;Jeon, Jin-Hong
    • Proceedings of the KIEE Conference
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    • 2000.11a
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    • pp.101-103
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    • 2000
  • 산업의 발달과 각종 기기의 고도화 및 정밀화에 의하여 전원에 민감한 기기들이 많은 산업 현장에 사용 되게 되었다. 이러한 민감한 기기는 입력 전원에 매우 민감하여 일반적인 정전뿐만 아니라 순간적으로 입력전압의 크기가 작아지는 순간전압강하에도 큰 영향을 받게된다. 본 논문에서는 전원측에서 순간전압강하가 발생하는 경우 부하에 영향을 미치지 않도록 하는 DVR에 대해서 제어알고리즘을 제시하고 시뮬레이션과 실험을 통하여 그 알고리즘의 타당성을 검증하였다.

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Three-Phase Z-Source Dynamic Voltage Restorer with a Fuel Cells Source (연료전지 전원을 갖는 3상 Z-소스 동적 전압 보상기)

  • Jung, Young-Gook
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.10
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    • pp.41-48
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    • 2008
  • This paper proposes a three-phase Z-source dynamic voltage restorer (Z-DVR) to mitigate the voltage sag for the critical loads. The proposed system is composed of passive filter and Z-source topology inverter. As an ESS(Energy Storage System) of the proposed system is employed the Proton Exchange Membrane Fuel Cells (PEMFC). To calculate and control the harmonics and compensation voltage, $i_{d}-i_{q}$ theory in dq rotating reference frame and PI controller are used. In case that three-phase voltage sags occurred, a PSIM simulation was done for the performance comparison of the conventional method employed battery stacks and proposed method. As a result, considering the voltage compensation performance, each method was nearly similar. Also, the compensation performance and the %THD(%Total Harmonic Distortion) result under the various source voltage conditions (sag or swell) were presented and discussed to show the performance of the proposed system.

Modeling and Control Design of Dynamic Voltage Restorer in Microgrids Based on a Novel Composite Controller

  • Huang, Yonghong;Xu, Junjun;Sun, Yukun;Huang, Yuxiang
    • Journal of Electrical Engineering and Technology
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    • v.11 no.6
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    • pp.1645-1655
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    • 2016
  • A Dynamic Voltage Restorer (DVR) model is proposed to eliminate the short-term voltage disturbances that occur in the grid-connected mode, the switching between grid-connected mode and the stand-alone mode of a Microgrid. The proposed DVR structure is based on a conventional cascaded H-bridge multilevel inverter (MLI) topology; a novel composite control strategy is presented, which could ensure the compensation ability of voltage sag by the DVR. Moreover, the compensation to specified order of harmonic is added to implement effects that zero-steady error compensation to harmonic voltage in specified order of the presented control strategy; utilizing wind turbines-batteries units as DC energy storage components in the Microgrid, the operation cost of the DVR is reduced. When the Microgrid operates under stand-alone mode, the DVR can operate on microsource mode, which could ease the power supply from the main grid (distribution network) and consequently be favorable for energy saving and emission reduction. Simulation results validate the robustness and effective of the proposed DVR system.

The Analysis of Zero Sequence Components in Dynamic Voltage Restorer System (영상성분을 고려한 DVR 기기 해석)

  • Jeong, Il-Yeop;Park, Sang-Yeong;Won, Dong-Jun;Mun, Seung-Il;Park, Jong-Geun;Han, Byeong-Mun
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.51 no.4
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    • pp.169-174
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    • 2002
  • The magnitude and phase of the compensating voltage in Dynamic Voltage Restorer (DVR) system depend on the voltage sag in the phases affected by the fault and on the influence of the zero sequence components. If the delta connection of the transformer is used, the zero sequence components do not appear on the load side. But nowadays, Y connected transformers with grounded neutral, that is 3-phase 4-wire system, are usually used. Therefore the zero-sequence components are occurred during faults. The zero-sequence components result in the high insulation costs and the asymmetry of the phase and magnitude of the terminal voltages. In this paper 3 phase 4 wire distribution system and 3 phase 3 wire system are analyzed and characteristics of voltage sag are presented. And this paper proposes the method that can mitigate the zero-sequence under the unbalance faults causing voltage sage and phase angle iumps.

Performance Improvement of DC-link Control for a Dynamic Voltage Restorer with Power Feedforward Compensation (전력 전향보상을 통한 동적전압보상기 직류단 전압 제어의 성능 향상)

  • Ji, Kyun Seon;Jou, Sung Tak;Lee, Kyo-Beum
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.9
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    • pp.1297-1305
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    • 2015
  • This paper proposes a power feedforward technique for the performance improvement of DC-link voltage control in the dynamic voltage restorer (DVR). The DC-link Voltage is able to be unstable for an instant owing to any change in the load and voltage sag. The distortion of the DC-link voltage leads to the negative influence on the performance of DVR. To mitigate the distortion of the DC-link voltage, the power feedforward component is calculated by the load power and the grid voltage, and then it is added to the reference current of the conventional DC-link voltage controller. By including output power feedforward component on the DC-link controller, the DC-link voltage can settle down more quickly than when the conventional DC-link voltage controller applied. The proposed technique was validated through the simulation and experimental results.

Improvement of PLL Method for Voltage Control of Dynamic Voltage Restorer (동적전압보상기의 전압제어를 위한 PLL 방식의 개선)

  • Kim, Byong-Seob;Choi, Jong-Woo
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.5
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    • pp.936-943
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    • 2009
  • Dynamic voltage restorer(DVR) is now more preferable enhancement than other power quality enhancement in industry to reduce the impact of voltage faults, especially voltage sags to sensitive loads. The main controllers for DVR consists of PLL(phase locked loop), compensation voltage calculator and voltage compensator. PLL detects the voltage faults and phase. Compensation voltage calculator calculates the reference voltage from the source voltage and phase. With calculated compensation voltage from PLL, voltage compensator restores the source voltage. If PLL detect ideal phase, compensation voltage calculator calculates ideal compensation voltage. Therefore, PLL for DVR is very important. This paper proposes the new method of PLL in DVR. First, the power circuit of DVR system is analyzed in order to compensate the voltage sags. Based on the analysis, new PLL for improving transient response of DVR is proposed. The proposed method uses band rejection filter(BRF) at q-axis in synchronous flame. In order to calculate compensation voltage in commercial instruments, the PQR theory is used. Proposed PLL method is demonstrated through simulation using Matlab-Simulink and experiment, and by checking load voltage, confirms operation of the DVR