• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.6
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• pp.38-43
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• 1981

In this paper an actively compensatedfinite gain amplifie. (FGA) with positive gain using 4 operational amplifiers and resistors is propo sod, and an application is considered in an active RC filter. By cancelling the effect of the GB's up to the third-order term of s on the transfer function, the proposed FGA has the extended frequency range over that of the FGA using 3 operational amplifiers. When this FGA is applied to an active RC filter with Pole frequncy of 100kHz, the magnitude error of the frequency characteristics of the filter is less than 2%.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.48 no.2
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• pp.56-63
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• 2011

This paper presents the method of giving hysteresis characteristics to the digital input port of microprocessors or micro-controllers and it's design procedures. And this paper shows the example of circuit design and the effect of this method by experiments. Presented method has advantages : By the additional one port and two resistors, input port can have hysteresis characteristics and hysteresis band is larger than TTL, CMOS schmitt trigger gates.

• Journal of the Semiconductor & Display Technology
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• v.5 no.1 s.14
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• pp.33-38
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• 2006

The ATE driver to test a high speed semiconductor chip is designed by using general logic drivers instead of dedicated pin drivers. We have proposed a structure of general logic drivers using FPCA and assured its correct operation by EDA tool simulation. PCB circuit was implemented and Altera FPGA chip was programmed using DDR I/O library. On the PCB, it is necessary to place two resistors connected output drivers near to the output pin to adjust an impedance matching. We confirmed that the measured results agree with the simulated values within 5% errors at room temperature for the input signals with 800Mbps data transfer rate and 1.8V operating voltage.

• Journal of the Korean Society for Precision Engineering
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• v.29 no.11
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• pp.1207-1213
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• 2012

Typically commercial controllers do not give data of the controller gains. Therefore, it is very hard to determine the optimal controller gain even though the dynamic model is derived. In this case, design of experiment (DOE) methodology can be a powerful tool for gain tuning. In this research, gain tuning process is proposed based on the DOE. Micro parallel mechanism platform with 3 degrees-of-freedom (DOF) is used for the experiments. Controller gains are measured indirectly from the voltages of adjustable resistors. The controller gains of three actuators are optimized by two or three steps, respectively. The correlations of the controller gains are also analyzed. The process and methodology can be adopted in gain tuning of other mechanical systems.

• Progress in Superconductivity
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• v.5 no.2
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• pp.144-148
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• 2004

Uniform current distribution among conductor layers in HTS cables using IPTs (inter-phase transformers) was investigated. Conventional methods for current distribution, in which resistors are inserted to conductor layers, causes additional loss. In contrast, IPTs, which use magnetic coupling, make it possible that the current in parallel circuits is distributed uniformly with any load, and minimize the loss. In this study, IPTs were designed and fabricated for examination of uniform current distribution in the conductor layers of HTS cables. The ITP was designed through calculation of its impedance that can cancel the inductance of the conduction layers. The experimental setup consisted of four IPTs and four inductors that simulate the conductor layer inductance. Each layer was designed to feed 10 A. We examined the behavior of current distribution with IPTs for various layer inductances.

• Journal of the Korean Institute of Telematics and Electronics
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• v.11 no.1
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• pp.15-22
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• 1974

A new ternary full adder using the current controlled negative-resistance circuit is described. The full adder is constructed from the modified-half-adder which was devised by making use of a negative resistance circuit. This full adder makes the number of its gates decrease and makes its own speed increase in comparison with the full adders which had been introduced previously. It is convenient to construct to the integrated circuit because transistor, SBD(Schottky Barrier Diode) and resistors were used as the circuit elements.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.57 no.3
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• pp.285-290
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• 2008

We have developed the absolute evaluation technique of capacitor and inductor by measuring the phase displacement as a function of resistance of employed resistors in voltage transformer(VT) comparator. The methods were applied to the capacitor with the range of 100 nF - $5{\mu}F$ and the inductor with the range of $100{\mu}H{\sim}1\;H$. The capacitance values of capacitor obtained using our method are consistent within the expanded uncertainty those obtained using capacitor bridge. The inductance values of inductor obtained using our method are also consistent within the expanded uncertainty those obtained using LCR meter.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.2032-2033
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• 2008

We have developed an evaluation technique for phase displacement of current transformer (CT) comparator by using the precise standard capacitors and resistors. By applying this technique for equivalent circuit of CT comparator evaluation system, we can obtain the calculated and measured phase displacement in the CT comparator. Thus we can evaluate phase displacement of CT comparator by comparing the calculated and measured phase displacement. The method was applied to CT comparator under test with the phase displacement ranges of $0{\sim}{\pm}7.5$ crad. Finally we have compared the phase displacement of the CT comparator under test theoretically obtained in this method with the specification.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2008.05a
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• pp.332-334
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• 2008

The matrix-type superconducting fault current limiter (SFCL) using YBCO thin film consists of the trigger and current-limiting parts. We fabricated the matrix-type SFCL with the integrated current limiting modules. we carried out the experiment of matrix-type SFCL with the integrated current limiting modules connected in series or parallel. We saw current characteristics due to ratio of change the shunt resistance and turns. We confirmed that the difference of critical current between superconducting units was decreased by increment of current flowing into the reactor which applied the magnetic field into the superconducting units..

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.5
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• pp.490-498
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• 2002

In this paper, a design method of LCL filter at the AC input side of a voltage source PWM converter is proposed. Effective method to prevent pollution of the utility caused by high frequency current ripple is to use a AC input LCL filter, The C elements in the filter provide a low impedance path for the high frequency component, preventing them from entering the utility. The resistors In series with the capacitors are used for damping the resonance in the filter The design examples are shown and the validity of the proposed design method is verified through the PSIM simulation.