• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.1
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• pp.45-52
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• 2021

The space vector control based voltage control method for a three-phase PWM rectifier requires a lot of effort to design an optimal switching pattern since a switching pattern for the switching section must be designed. In this study, a D-Q control based SPWM output voltage control algorithm was studied for the three-phase six-pulse CVS type rectifier. In the output voltage control algorithm, three-phase reference signals are obtained from the D-Q transformation based on the space vector representation method, instead of the switching pattern, SPWM method is used to generate rectifier switching control signals. Next, a three-phase six-pulse CVS PWM rectifier based on D-Q transformation and SPWM was modeled using EMTP-RV. Finally, the validity of the D-Q control-based SPWM voltage control algorithm was confirmed by comparing the output voltage waveform obtained through EMTP-RV simulation works with a reference value and confirming that the output voltage accurately follows the reference voltage.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.2
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• pp.447-452
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• 2017

The stator phase winding of a linear pulse motor, which is a new type of linear motor, is comprised of two phases and is structurally characterized by a stacking method in which the winding of one phase is laid on top of the winding of another phase. Such a structural characteristic induces a difference in the flux linkage resulting from the flux of each stator phase winding in the same condition. The difference in the induced flux linkage acts as a kind of thrust ripple component in terms of the generated thrust. Thus, in order to maintain consistent thrust force, a method is required to solve the problem caused by the structural singularity. Hence, in this study, we present a technique for reducing the thrust force ripple generated by the stacking of the stator phase windings of a linear pulse motor through the generation of a compensating current reference value of the current controller in order to keep the torque constant. The proposed compensating algorithm is validated by simulations and experimental results.

• Journal of Power Electronics
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• v.11 no.3
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• pp.375-380
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• 2011

A STATic synchronous COMpensator (STATCOM) is a shunt connected voltage source converter (VSC) based FACTS controller using Gate Turn Off (GTO) power semiconductor devices employed for reactive power control. The operation principal is similar to that of a synchronous condenser. A typical application of a STATCOM is voltage regulation at the midpoint of a long transmission line for the enhancement of power transfer capability and/or reactive power control at the load centre. This paper presents the modeling of STATCOM with twenty four pulse three level VSC and Type-1 controller to regulate the reactive current or the bus voltage. The performance is evaluated by transient simulation. It is observed that, the STATCOM shows excellent transient response to step change in the reactive current reference. While the eigenvalue analysis is based on D-Q model, the transient simulation is based on both D-Q and 3 phase models of STATCOM (which considers switching action of VSC).

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• Journal of Power Electronics
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• v.15 no.3
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• pp.730-740
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• 2015

This paper presents model reference adaptive system speed estimators based on Type-1 and Type-2 fuzzy logic controllers for the speed sensorless direct torque and flux control of an induction motor drive (IMD) using space vector pulse width modulation. A Type-1 fuzzy logic controller (T1FLC) based adaptation mechanism scheme is initially presented to achieve high performance sensorless drive in both transient as well as in steady-state conditions. However, the Type-1 fuzzy sets are certain and cannot work effectively when a higher degree of uncertainties occurs in the system, which can be caused by sudden changes in speed or different load disturbances and, process noise. Therefore, a new Type-2 FLC (T2FLC) - based adaptation mechanism scheme is proposed to better handle the higher degree of uncertainties, improve the performance, and is also robust to different load torque and sudden changes in speed conditions. The detailed performance of different adaptation mechanism schemes are performed in a MATLAB/Simulink environment with a speed sensor and sensorless modes of operation when an IMD is operates under different operating conditions, such as no-load, load, and sudden changes in speed. To validate the different control approaches, the system is also implemented on a real-time system, and adequate results are reported for its validation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.83-88
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• 2003

The reset operation of a CCD image sensor was improved using charge trapping of a MOS structure to realize a loe voltage driving. A DC bias generating circuit was added to the reset structure which sets reference voltage and holds the signal charge to be detected. The generated DC bias is added to the reset pulse to give an optimized voltage margin to the reset operation, and is controlled by adjustment of the threshold voltage of a MOS transistor in the circuit. By the pulse-type stress voltage applied to the gate, the electrons and holes were injected to the gate dielectrics, and the threshold voltage could be adjusted ranging from 0.2V to 5.5V, which is suitable for controlling the incomplete reset operation due to the process variation. The charges trapped in the silicon nitride lead to the positive and negative shift of the threshold voltage, and this phenomenon is explained by Poole-Frenkel conduction and Fowler-Nordheim conduction. A CCD image sensor with $492(H){\;}{\times}{\;}510(V)$ pixels adopting this structure showed complete reset operation with the driving voltage of 3.0V. The resolution chart taken with the image sensor shows no image flow to the illumination of 30 lux, even in the driving voltage of 3.0V.

• Computers and Concrete
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• v.24 no.1
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• pp.19-35
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• 2019

In this paper, the effect of the type and amount of fibers on the physicomechanical properties of concrete containing fine recycled refractory brick (RRB) and natural aggregate subjected to elevated temperatures was investigated. For this purpose, forta-ferro (FF), polypropylene (PP), and polyvinyl alcohol (PVA) fibers with the volume fractions of 0, 0.25, and 0.5%, as well as steel fibers with the volume fractions of 0, 0.75, and 1.5% were used in the concrete containing RRB fine aggregate replacing natural sand by 0 and 100%. In total, 162 concrete specimens from 18 different mix designs were prepared and tested in the temperature groups of 23, 400, and $800^{\circ}C$. After experiencing heat, the concrete properties including the compressive strength, ultrasonic pulse velocity (UPV), weight loss, and surface appearance were evaluated and compared with the corresponding results of the reference (unheated) specimens. The results show that using RRB fine aggregate replacing natural fine aggregate by 100% led to an increase in the concrete compressive strength in almost all the mixes, and only in the PVA-containing mixes a decrease in strength was observed. Furthermore, UPV values at $800^{\circ}C$ for all the concrete mixes containing RRB fine aggregate were above those of the natural aggregate concrete specimens. Finally, regarding the compressive strength and UPV results, steel fibers demonstrated a better performance relative to other fiber types.

• Journal of Electrical Engineering and Technology
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• v.3 no.3
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• pp.422-429
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• 2008

This paper presents compact low frequency ultra-wide band (UWB) sensor design and study of the partial discharge diagnosis by sensing electromagnetic pulse emitted from the partial discharge source with the newly designed UWB sensor. In this study, we designed a new type of compact low frequency UWB sensor based on microstrip antenna technology to detect both the low frequency and high frequency band of the partial discharge signal. Experiments of offline PD testing on medium voltage (22.9kV) underground cable mention the comparative results with the traditional HFCT as a reference sensor in the laboratory. In the series of comparative tests, the calibration signal injection test provided with the conventional IEC 60270 method and high voltage injection testing are included.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2008.05a
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• pp.245-248
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• 2008

This paper gives a description of the mode'ling and control of a single phase PWM(Pulse Width Modulation) converter for HEMU-400X(High-speed Electric Multiple Unit - 400 km/h experiment). The converter is part of a Auxiliary power unit supplied by the 25[kV], 60[Hz] overhead line. A model of the converter in a synchronously rotating reference frame of coordinates is used to develop a new type of control. The control system has separate controllers for the active and reactive current, permitting the free choice of the power factor. This paper proposes a new control method of PWM converter for Auxiliary power unit.

• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.165-168
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• 2002

As the demand for higher data-rate chip-to-chip communication such as memory-to-controller, processor-to-processor increases, low cost high-speed serial links\ulcorner become more attractive. This paper describes a 0.25-fm CMOS 1.6Gbps/pin 4-level transceiver using Stub Series Terminated Logic for high Bandwidth. For multi-gigabit/second application, the data rate is limited by Inter-Symbol Interference (ISI) caused by channel low pass effects, process-limited on-chip clock frequency, and serial link distance. The proposed transceiver uses multi-level signaling (4-level Pulse Amplitude Modulation) using push-pull type, double data rate and flash sampling. To reduce Process-Voltage-Temperature Variation and ISI including data dependency skew, the proposed high-speed calibration circuits with voltage swing controller, data linearity controller and slew rate controller maintains desirable output waveform and makes less sensitive output. In order to detect successfully the transmitted 1.6Gbps/pin 4-level data, the receiver is designed as simultaneous type with a kick - back noise-isolated reference voltage line structure and a 3-stage Gate-Isolated sense amplifier. The transceiver, which was fabricated using a 0.25 fm CMOS process, performs data rate of 1.6 ~ 2.0 Gbps/pin with a 400MHB internal clock, Stub Series Terminated Logic ever in 2.25 ~ 2.75V supply voltage. and occupied 500 * 6001m of area.