• 한국군사과학기술학회지
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• 제17권3호
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• pp.311-317
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• 2014

In this paper, the flexible and reconfigurable frequency selective surface for C-band was designed using patch array and grid structure for radome and other curved surface applications. Frequency reconfigurability was obtained by varying the capacitance of varactor diode and flexibility is implemented by using flexible PCB. For the validity of the proposed structure, we fabricated the flexible and reconfigurable frequency selective structure and measured the frequency reconfigurability for different bias voltages and different curvature surfaces from the optimized design parameters. From the measurement results, we know that the proposed structure has the wideband reconfigurable frequency bandwidth of 6.05-7.08GHz. We can apply this proposed structure to the curved surface like as radome of aircraft or warship.

• JSTS:Journal of Semiconductor Technology and Science
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• 제11권4호
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• pp.318-328
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• 2011

Stage-level reconfigurable chip multiprocessor (CMP) aims to achieve highly reliable and fault tolerant computing by using interwoven pipeline stages and on-chip interconnect for communicating with each other. The existing crossbar-switch based stage-level reconfigurable CMPs offer high reliability at the cost of significant area/power overheads. These overheads make realizing large CMPs prohibitive due to the area and power consumed by heavy interconnection networks. On other hand, area/power-efficient architectures offer less reliability and inefficient stage-level resource utilization. In this paper, I propose a hierarchical multiplexing interconnection structure in lieu of crossbar interconnect to design area/power-efficient stage-level reconfigurable CMP. The proposed approach is able to keep the reliability offered by the crossbar-switch while reducing the area and power overheads. Experimental results show that the proposed approach reduces area by up to 21% and power by up to 32% when compared with the crossbar-switch based interconnection network.

• Journal of electromagnetic engineering and science
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• 제15권2호
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• pp.115-119
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• 2015

This paper proposes a reconfigurable square-patch antenna with polarization diversity. The proposed antenna consists of a square radiating patch and a Y-shaped feed structure with two PIN diodes. The shape of the feed structure can be changed by adjusting the bias states of the two PIN diodes, which helps switch between two orthogonal linear polarizations. The polarization diversity characteristic is validated by the simulated current distribution and the measured radiation pattern.

• 한국전자파학회논문지
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• 제25권1호
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• pp.1-9
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• 2014

본 논문에서는 Y자 형태의 급전 구조를 사용한 두 개의 편파 변환 재구성 패치 안테나를 제안하였다. 제안된 안테나는 정사각형 형태의 패치, Y자 형태의 급전 구조, 하나의 핀 다이오드, 다이오드를 동작시킬 DC bias 회로로 구성되어 있다. 구조적인 대칭/비대칭은 두 갈래로 갈라지는 Y자 형태의 급전부 왼쪽 라인에 삽입된 핀 다이오드의 on/off 상태에 의해 결정된다. 제안된 재구성 안테나는 핀 다이오드가 on 상태이면 급전부의 갈라지는 두 마이크로스트립 라인의 길이가 같아지게 되어 안테나는 선형 편파 특성을 나타낸다. 반면에, 핀 다이오드가 off 상태이면 급전부의 갈라지는 두 마이크로스트립 라인 중 한 쪽 라인의 길이가 나머지 한 쪽 라인의 길이보다 상대적으로 짧아지게 된다. 그러므로 안테나는 원형 편파 특성을 나타낸다. 측정 결과로부터 제안된 안테나는 좋은 임피던스 매칭과 축비 특성을 나타내며, 같은 주파수 대역에서 쉽게 편파 변환할 수 있다는 것을 확인할 수 있다.

• 제어로봇시스템학회논문지
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• 제11권12호
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• pp.1002-1010
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• 2005

We study on the implementation of reconfigurable position control system which is based on Open Control Platform(OCP) for Unmanned Expedition Vehicles(UEV) in ubiquitous environment. The control system uses hierarchical control structure and OCP structure which contains three layers such as core OCP, reconfigurable control API(Application Programmer Interface), generic hybrid control API. The goal of our research is to implement an UEV control system using advanced software technology. As a specific control problem, we study a transition management problem between PID control and neural network control depending on fault or parameter change of the plant, i.e., UEV. The concept of the OCP-based software-enabled control can provide synergy effect by the integration of software component, middleware, network communication, and control, and thus can be applied to various systems in ubiquitous environment.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 2006년도 춘계공동학술대회 논문집
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• pp.167-171
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• 2006

It has been well known that customer' needs have much influence on the structure of supply chains. Uncertainty in customer demands forces companies' supply chains to be very flexible. When a company can not meet customers' changing needs, competitiveness in market places will be jeopardized. To survive in the competitive market places, structure of supply chains should be reconfigurable. In this paper, fractal concept is adopted to handle the reconfigurable issue. In a fractal-based SCM, structure of supply chains can be automatically reconfigured through the dynamic restructuring process with a fractal goal model. Goal in the system is divided into sub-goals, which are represented by a fractal goal model. The fractal goal model is a formal model which can be evaluated, changed, and scaled easily. Thus a well-designed fractal goal model is indispensable for a fractal-based SCM, and enhances the reconfigurability. Fractal structure for reconfigurable SCM is designed and presented. Fractal goal model is applied to SCM and an exemplary case is also briefly illustrated.

• ETRI Journal
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• 제38권4호
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• pp.654-664
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• 2016

This paper presents a transformer-based reconfigurable synchronous boost converter. The lowest maximum power point tracking (MPPT)-input voltage and peak efficiency of the proposed boost converter, 20 mV and 88%, respectively, were achieved using a reconfigurable synchronous structure, static power loss minimization design, and efficiency boost mode change (EBMC) method. The proposed reconfigurable synchronous structure for high efficiency enables both a transformer-based self-startup mode (TSM) and an inductor-based MPPT mode (IMM) with a power PMOS switch instead of a diode. In addition, a static power loss minimization design, which was developed to reduce the leakage current of the native switch and quiescent current of the control blocks, enables a low input operation voltage. Furthermore, the proposed EBMC method is able to change the TSM into IMM with no additional time or energy loss. A prototype chip was implemented using a $0.18-{\mu}m$ CMOS process, and operates within an input voltage range of 9 mV to 1 V, and an output voltage range of 1 V to 3.3 V, and provides a maximum output power of 37 mW.

• 전기전자학회논문지
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• 제13권2호
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• pp.101-107
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• 2009

집적회로의 공정기술 및 설계기술이 발전함에 따라 많은 IP가 하나의 반도체 칩에 집적되어 하나의 시스템을 구성하는 SoC 설계가 많이 이루어지고 있다. 본 논문에서는 다양한 IP 간에 효율적인 데이터 통신이 이루어지도록 버스 상의 전송 특성에 따라 버스모드를 동적으로 재구성하는 SoC 3중 버스 구조를 제안한다. 제안된 버스는 다중-단일버스 모드, 단일-다중버스 모드로 재구성이 가능하며 따라서 단일버스 모드와 다중버스 모드의 장점을 모두 갖는다. 실험결과 제안된 버스구조는 기존의 고정된 버스구조보다 독립적이며 데이터 전송시간을 단축시킬 수 있음을 확인하였다. 그리고 제안된 버스구조를 JPEG 시스템에 적용한 결과 다중버스구조보다 평균 22%의 전송시간 단축을 얻을 수 있었다.

• 대한산업공학회지
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• 제32권2호
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• pp.82-90
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• 2006

Reconfigurability of machine tools is one of the critical factors to realize the responsive manufacturing systems to satisfy the mass customization production. This paper presents the methods to model the reconfigurable machine tools (RMTs) on Internet in response to change in the machining requirements. Specifically, the structure and motion model of machine tools using module combination rules and connectivity graph are developed. And we developed Internet-based simulator for designing of RMTs (ISD-RMT). In response to the user requirements, various structures of RMTs can be derived using the module combination rules and connectivity graph relationships. In addition, the user can verify generating structures through the control and simulation procedures.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권3호
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• pp.261-273
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• 2016

Reconfigurable finite impulse response (FIR) filters whose filter coefficients and filter order change dynamically during run-time play an important role in the software defined radio (SDR) systems, multi-channel filters, and digital up/down converters. However, there are not many reports on such reconfigurable designs which can support dynamic variation of filter order and filter coefficients. The purpose of this paper is to provide an architectural solution for the FIR filters to support run-time variation of the filter order and filter coefficients. First, two straightforward designs, namely, (i) single-MAC based design and (ii) full-parallel design are presented. For large variation of the filter order, two designs based on (iii) folded structure and (iv) fast FIR algorithm are presented. Finally, we propose (v) high throughput design which provides significant advantage in terms of hardware and/or time complexities over the other designs. We compare complexities of all the five structures, and provide the synthesis results for verification.