• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.3
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• pp.194-201
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• 2014

This paper is able to be solved by improving degradation in multi-path environment by adjust beam pattern angle through modifying pulse phase of each antennas by using TRM (Transmitter Receiver Module). Beam Scanning Array Antenna, which is transmitter/receiver that improves degradation in multi-path environment without any signal distortion, is designed and manufactured. Beam Scanning Array Antenna should be able to send/receive signal at the antenna's longitudinal part without distortion and should not influences other systems. Also, it should include target detecting ability by beam steering.Dispersion characteristic of Beam Scanning Antenna, which is designed, is analysed by using fidelity, and steering and radar resolution performance is verified by using $1cm{\times}1cm$ sized target. To manufacture Beam Scanning Array Antenna, control board and GUI, which is able to control Vivaldi Antenna for IR-UWB, Tri-Band Wilkinson power divider, and TRM (Transmitter Receiver Module), is designed. Throughout this research, developed Beam Scanning UWB Array Antenna system is adoptable for radar application field. and time domain analysis techniques by using network analyser made the antenna characteristics analysis for setting up antenna more accurate. In addition, it makes beam width checking without difficulties.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.191-196
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• 2005

A low-cost, high-performance 40 Gb/s clock recovery module using a phase-locked loop(PLL) for a 40 Gb/s optical receiver has been designed and implemented. It consists of a clock recovery circuit, a RF mixer and frequency discriminator for phase/frequency detection, a DR-VCO, a phase shifter, and a hold circuit. The recovered 40 GHz clock is synchronized with a stable 10 GHz DR-VCO. The clock stability and jitter characteristics of the implemented PLL-based clock recovery module has shown to significantly improve the performance of the conventional open-loop type clock recovery module with DR filter. The measured peak-to-peak RMS jitter is about 230 fs. When input signal is dropped, the 40 GHz clock is generated continuously by hold circuit. The implemented clock recovery module can be used as a low-cost and high-performance receiver module for 40 Gb/s commercial optical network.

• The Transactions of the Korea Information Processing Society
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• v.4 no.12
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• pp.3133-3138
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• 1997

The Digital Broadcasting Satallite System consists of the Transmitter station, the Resource and Subscriber Management System, and the Receiver Test Unit. The RSMS consists or several modules such as Resource Main Module, Resource User Interface Module, Transmitter Station Interface Module, Receiver Test Unit Interface Module, Subscriber sales Outlets Module and Monitor & Control Module. In this paper we suppose the new RRMC Algorithms that is to manage efficiently the Resource and subscriber information in the Direct Broadcasting Satellite system based on client-sever features and demonstrates the implementation method of monitoring and control the system in real time. Also we explain the communication procedure between resource and subscriber managment and other equipment.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.7
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• pp.500-507
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• 2018

A three-channel radio frequency (RF) monopulse receiver using a data signal with a maximum transmission rate of 274 Mbps was designed. A monopulse receiver using a broadband communication signal was designed to operate in the Ku band, and it consists of a down-conversion module and a signal-processing module. To satisfy the performance of the proposed RF monopulse receiver, a signal-processing function less than the reception sensitivity for each transmission rate according to the adaptive transmission rate is required. To minimize signal reception and mutual frequency interference of various bandwidths, two RF filters were applied. To verify the satisfaction of system requirements, an AWR Corp. simulation tool was used.

• Proceedings of the KIEE Conference
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• 2006.10c
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• pp.394-396
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• 2006

When developing a new GPS receiver module, the essential problems are evaluation of reliable algorithms, software debugging, and performance comparison between algorithms to find optimal solution. Most GPS receiver modules nowadays use a correlator to track signals from satellites and an MCU (Micro Controller Unit) to control operations of the entire module. The problem of software evaluation from MCU is very difficult, due to limitation of MCU resources and low ability of interfacing with user. Normally, user has to expense special tool kit for a limiting access to MCU but it is also hard to use. This article introduces an implementation of a GPS receiver test bed using correlator GP2021 interfacing with ISA (Industry Standard Architecture) PC bus. This way can give user complete control and visibility into the operation of the receiver, then user can easily debug program and test algorithms. For this article, the least square method is implemented to test the hardware and software performance.

• Journal of Korea Society of Digital Industry and Information Management
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• v.11 no.1
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• pp.19-25
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• 2015

In this time, as an industrial society developed to a welfare society, more and more people want their quality of lives upgraded and specially customized service by mass production/mass consumption. And it leads to an increase of requiring service. There're active developments and studies on various IT equipment as the requirement made IT devices used in service. In this paper, we try to design and realize radio paging DID by using smart device to be used as a receiver of a radio pager which is broadly used at face to face service. Firstly, we used MCU to design and implement Wireless Calling Gateway which change radio calling signal of ISM band to smart device. A receiver of wireless caller used original receiver module. Also it used bluetooth module to communicate with smart device. It was possible to have satisfactory communication since radio paging signal converter and smart device were linked in 3M. Secondly, to indicate various paging information delivered from a radio pager, we realized DID application program by using Smart PAD. As a result, we could indicate various information compared to an original receiver which only could indicate letters or numeric data. Secondly, we implemented the DID app for wireless calls that can display a variety of information sent from a wireless pager. Was implemented using the Smart Pad. As a result, it is shown that can display a variety of information than the existing receiver.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.16 no.10 s.101
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• pp.1050-1058
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• 2005

This paper presents how to design and implement a very compact, cost effective and broad band receiver module for IEEE 802.16 FWA(Fixed Wireless Access) in the 40 GHz band. The presented receiver module is fabricated in a multi-layer LTCC(Low Temperature Cofired Ceramic) technology with cavity process to achieve excellent electrical performances. The receiver consists of two MMICs, low noise amplifier and sub-harmonic mixer, an embedded image rejection filter and an IF amplifier. CB-CPW, stripline, several bond wires and various transitions to connect each element are optimally designed to keep transmission loss low and module compact in size. The LTCC is composed of 6 layers of Dupont DP-943 with relative permittivity of 7.1. The thickness of each layer is 100 um. The implemented module is $20{\times}7.5{\times}1.5\;mm^3$ in size and shows an overall noise figure of 4.8 dB, an overall down conversion gain of 19.83 dB, input P1 dB of -22.8 dBm and image rejection value of 36.6 dBc. Furthermore, experimental results demonstrate that the receiver module is suitable for detection of Digital TV signal transmitted after up-conversion of $560\~590\;MHz$ band to 40 GHz.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.595-598
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• 2005

본 논문은 HD급의 디지털 방송 수신을 위한 DTV Receiver의 Interface의 구현에 관한 솔루션을 소개 할 것이다. 이를 위해 DTV의 Platform 및 기본 동작을 위한 OS 및 회로 기술 등의 인터페이스 구성에 관한 내용에 관해 자세히 기술 할 것이다.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.6
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• pp.1537-1544
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• 2012

In this paper, a new integration of linear mapping capability with 4-20mA current loop receiver. This module allow user to change instrument variable instantly. Configurations are easy to set by using console command through serial communication port. Break in current loop or faulty current transmitter are easily detect through indicator. The implementation of the module and the test results are discussed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.6-14
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• 2011

This paper presents a high-speed QR decomposition architecture for the multi-input-multi-output (MIMO) receiver based on Givens rotation. Under fast-varying channel, since the inverse matrix calculation has to be performed frequently in MIMO receiver, a high performance and low latency QR decomposition module is highly required. The proposed QR decomposition architecture is composed of Sign-Select Lookahead (SSL) coordinate rotation digital computer (CORDIC). In the SSL-CORDIC, the sign bits, which are computed ahead to select which direction to rotate, are used to select one of the last iteration results, therefore, the data dependencies on the previous iterations are efficiently removed. Our proposed QR decomposition module is implemented using TSMC 0.25 ${\mu}M$ CMOS process. Experimental results show that the proposed QR architecture achieves 34.83% speed-up over the Compact CORDIC based architecture for the 4 ${\times}$ 4 matrix decomposition.