• Journal of Computing Science and Engineering
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• v.6 no.1
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• pp.26-38
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• 2012

Java has been increasingly used in programming for real-time systems. However, some of Java's features such as automatic memory management and dynamic compilation are harmful to time predictability. If these problems are not solved properly then it can fundamentally limit the usage of Java for real-time systems, especially for hard real-time systems that require very high time predictability. In this paper, we propose to exploit multicore computing in order to reduce the timing unpredictability that is caused by dynamic compilation and adaptive optimization. Our goal is to retain high performance comparable to that of traditional dynamic compilation, while at the same time, obtain better time predictability for Java virtual machine (JVM). We have studied pre-compilation techniques to utilize another core more efficiently, preoptimization on another core (PoAC) scheme to replace the adaptive optimization system (AOS) in Jikes JVM and the counter based optimization (CBO). Our evaluation reveals that the proposed approaches are able to attain high performance while greatly reducing the variation of the execution time for Java applications.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.3
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• pp.257-267
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• 2005

The real-time operating system(RTOS) simulator, one of the tools provided by RTOS development environment, allows users to develop and debug application programs even before the target hardware is ready. Thus, most of commercial RTOS development environments provide with RTOS simulator for the purpose. But they are implemented to simulate only functional aspects on a host system, so that it is not possible to estimate execution time of application programs on the target hardware. Since the real-time system has to complete program executions in predetermined time, the RTOS simulator that can estimate the execution time is yeW useful in the development phase. In this study, we develop a machine instruction-level RTOS simulator that is able to estimate execution time of application programs on a target hardware, and prove its functionality and accuracy by using test .programs.

• Journal of Computing Science and Engineering
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• v.8 no.4
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• pp.215-227
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• 2014

In modern computer architectures, caches are widely used to shorten the gap between processor speed and memory access time. However, caches are time-unpredictable, and thus can significantly increase the complexity of worst-case execution time (WCET) analysis, which is crucial for real-time systems. This paper proposes a time-predictable two-level scratchpad-based architecture and an ILP-based static memory objects assignment algorithm to support real-time computing. Moreover, to exploit the load/store latencies that are known statically in this architecture, we study a Scratch-pad Sensitive Scheduling method to further improve the performance. Our experimental results indicate that the performance and energy consumption of the two-level scratchpad-based architecture are superior to the similar cache based architecture for most of the benchmarks we studied.

• Journal of the Korean Society for Precision Engineering
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• v.25 no.9
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• pp.45-52
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• 2008

As multiple functions arc required in a robot controller, RTOS(Real Time Operating System) should be adopted to manage complex situations, such as choosing most urgent task among competing ones. In this paper, we implemented RTAI(Real Time Application Interface) based robot controller for wafer handling robots including graphic simulator. We showed how multiple tasks are organized and also explained in detail about task priorities and execution periods. Finally, we presented simulation results.

• IEMEK Journal of Embedded Systems and Applications
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• v.18 no.3
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• pp.117-124
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• 2023

In the machine vision inspection equipment, diameter measurement is important process in inspection of cylindrical object. However, machine vision inspection equipment requires complex algorithm processing such as camera distortion correction and perspective distortion correction, and the increase in processing time and cost required for precise diameter measurement. In this paper, we proposed the algorithm for diameter measurement of cylindrical object using the laser displacement sensor. In order to fit circle for given four input outer points, grid search algorithms using root-mean-square error and mean-absolute error are applied and compared. To solve the limitations of the grid search algorithm, we finally apply the singular-value-decomposition based circle fitting algorithm. In order to compare the performance of the algorithms, we generated the pseudo data of the outer points of the cylindrical object and applied each algorithm. As a result of the experiment, the grid search using root-mean-square error confirmed stable measurement results, but it was confirmed that real-time processing was difficult as the execution time was 10.8059 second. The execution time of mean-absolute error algorithm was greatly improved as 0.3639 second, but there was no weight according to the distance, so the result of algorithm is abnormal. On the other hand, the singular-value-decomposition method was not affected by the grid and could not only obtain precise detection results, but also confirmed a very good execution time of 0.6 millisecond.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.1803-1804
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• 2006

The purpose of this paper is to implement a Labview based TFDR Real Time system through the instruments of Pci eXtensions for Instrumentation(PXI). The proposed load impedance measurement algorithm was verified by experiments via the implemented real time system. The TFDR real time system consisted of the reference signal design, signal generation, signal acquisition, algorithm execution and results display parts. To implement real time system, all of the parts wore programmed by the Labview which is one of graphical programming languages. In the application software implemented by the Labview we were able to design a suitable reference signal according to the length and frequency attenuation characteristics of the target cable and controled the arbitrary waveform generator(ZT500PXI) of the signal generation part and the digital storage oscilloscope(ZT430PXI) of the signal acquisition part. By using the TFDR real time system with the terminal resistor on the target cable, we applied to the load impedance measurements. In the proposed load impedance algorithm a normalized time-frequency cross correlation function and a cross time-frequency distribution function was employed to calculate the reflection coefficient and phase difference between the input and the reflected signals.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.438-440
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• 2004

Energy consumption has become an increasingly important consideration in designing real-time embedded systems. In this paper, we propose a voltage scaling method to reduce energy consumption in fixed priority real-time systems using variable voltage processors. The Hyperperiod of tasks is divided into dimains. The most suitable voltage of each domain is determined off-line and stored in a table. During task execution, the voltage of processor is adjusted according to the information of the table. A simulation result shows that the proposed method can reduce 80% of power consumption in comparison to no power management. The difference to the optimal EDF based method is only 5%.

• ETRI Journal
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• v.18 no.4
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• pp.245-264
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• 1997

This paper presents a formalism-based methodology and its implemented environment which constitutes a sound framework for real-time systems development. The software and/or hardware systems developed in such a formal manner are well structured and maintainable. We first propose a set-theoretic VSSS (Variable Structure System Specification) formalism. This formalism is the core of the presented methodology which supports a means of formal specification for real-time systems. We then develop the environment, including VSSS language definition, a translator for the language, and supporting libraries for real-time execution. Finally, a demonstration of the methodology in development of a real-time event manager, a subsystem of an ATM-based communication system, shows the correctness and efficiency of the methodology.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.29-38
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• 1997

As the trend of the automation is increasing, the usage of the programmable automation equipments like programmable controller(PC), numerical controller(NC), distributed control systems(DCS) and robot controller is greatly expanding in the area of the industrial equipments. But the development of the programing language for the programmable automatic equipment is rarely accomplished. In this paper, we propose design and implementation technique of the real-time mechanism control language by adding time constraint constructs and timing analysis constructs ot conditional statement and iteration statement of a programming language. Moreover, we made it possible to predict plausibility of time constraint constructs of a real time application program at compilation time and developing execution time analysiss technique.

• The Journal of the Korea Contents Association
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• v.4 no.2
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• pp.50-60
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• 2004

Recently, most of the embedded system is required not only many functions but also real-time characteristics in purpose. In the hard real-time system, especially, strict deadline of periodic task can affect the performance of the system. In this paper, we design and implement the scheduler based on RM(Rate-Monotonic) rule. This scheduler makes feasible patterns based on EDF(Earliest deadline first) rule with extended schedulability inspection before execution, for periodic task-set that has high CPU utilization and then, execute periodic task-set depended on feasible patterns. The feasible pattern formed into EDF rule is capable of the efficiency of CPU up to 100 percentage and by the referenced execution of the feasible pattern is possible of removing the red-time scheduling overhead that is the defect of the order of dynamic assignment rule.