• 반도체디스플레이기술학회지
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• 제23권3호
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• pp.1-6
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• 2024

Recent research on embedded systems has become increasingly important due to their central role in high-performance embedded devices, including artificial intelligence, autonomous driving, and energy management technologies. Embedded systems are specialized computer systems designed to perform specific tasks while optimizing performance and minimizing memory usage. RISC-V, an open RISC-based instruction set architecture developed by the University of Berkeley in 2010, is well-suited for these systems. In addition to the base 32-bit integer instruction set, RISC-V supports extensions such as the M-extension for multiplication and division and the C-extension for instruction compression. In this paper, we propose the design of a 32-bit 5-stage pipeline RV32IMC processor aimed at high-performance embedded devices. By incorporating the RV32IMC instruction set, the proposed processor achieves enhanced computational efficiency and reduced code size, making it a strong candidate for energy-efficient, high-performance embedded applications. Furthermore, the design was validated on an Artix-7 field-programmable gate array, demonstrating the processor's feasibility and potential benefits for embedded systems.