• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.709-712
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• 2001

The effects of post annealing temperature by the Rapid Thermal Annealing(RTA) on the electrical properties of Pb(Zr,Ti)O$_3$(PZT) thin film were investigated. Analyses by the RTA treatments reveled that the leakage current of PZT thin films strongly depend on heating temperature and time. It was found that leakage current properties of PZT capacitor were changed by heating temperature during the RTA annealing. On Pt/Ti/Si substrates, PZT films are deposited at 350 $^{\circ}C$ by rf magnetron sputtering. The X-ray diffusion (XRD) was confirmed the formation of PZT thin film. Leakage current characteristics were improved with decreasing the post annealing temperature of PZT thin film. RTA annealed film on the 700$^{\circ}C$ shows ferroelectric and electrical properties with a remanent polarization of 12.4${\mu}$C/$\textrm{cm}^2$ coercive field of 117kV/cm, leakage current J= 6.2${\times}$10$\^$-6/ A/$\textrm{cm}^2$

• 한국재료학회지
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• 제3권3호
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• pp.310-315
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• 1993

P-type(100)Si Wafer 위에 400$\AA$의 Ta를 증착하여 열산화법으로 ${Ta_2}{O_5}$박막을 형성시킴 후 RTA후처리를 통하여 절연파괴전장 특성 개선을 이루고자 하였다. 유전상수에 미치는 RTA후처리의 영향은 미약하지만 절연파괴전장을 나타내었으나 결정화 온도 이하의 RTA온도에서는 절연파괴전장이 5.4MV/cm로 RTA효과가 크게 나타났다. 이러한 RTA효과는 RTA온도 $575^{\circ}C$에서 flat band voltage shift가 RTA 시간에 따라 변화가 없는 것으로 미루어 보아 RTA효과는 계면 변화에 의한 것이 아님을 알 수 있었으며, RBS 분석을 통하여 ${Ta_2}{O_5}$1박막의 치밀화에 의한 것임을 확인할 수 있었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 디스플레이 광소자분야
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• pp.102-105
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• 2004

With varying rapid thermal annealing (RTA) temperature, luminescent properties of ZnMgS:Mn thin film sputter-deposited with one target were measured. Although all samples have the same composition, $Zn_{1-x}Mg_xS:Mn$ (x=0.25) can emit luminescence between 580 and 614 nm, which is controlled by only RTA temperature. It is understood that the energy band gap shift of ZnMgS:Mn thin film phosphor occurs with varying RTA temperature.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권4호
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• pp.266-272
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• 2009

In the present work three dimensional process and device simulations were employed to study the performance variations with RTA. It is observed that with the increase in RTA temperature, the arsenic dopants from the source /drain region diffuse laterally under the spacer region and simultaneously acceptors (Boron) are redistributed from the central axis region of the fin towards the Si/SiO2 interface. As a consequence both drive current and peak cut-off frequency of an n-FinFET are observed to improve with RTA temperatures. Volume inversion and hence the flow of carries through the central axis region of the fin due to reduced scattering was found behind the performance improvements with increasing RTA temperature.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.379-382
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• 1988

In this paper optimal light source arraies are calculated to reduce slips in RTA process. A two-channel temperature controller is constructed on a board using IBM - XT to improve the temperature uniformity. The proposed RTA structure has also advantage of power dissipation.

• 전자공학회논문지A
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• 제31A권9호
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• pp.96-103
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• 1994

The GaAs epilayer was grown at low temperature (LT. 250.deg. C) by molecular beam epitaxy. The properties of the LTT GaAs, before and after Rapid Thermal Annealing(RTA), were analyzed by Reflection of High Energy Electron Diffraction (RHEED), Double Crystal X-ray(DCX), Raman spectroscopy, PL and Photo-Induced Current Transient Spectroscopy (PICTS). The LT GaAs before RTA, was analyzed by RHEED and DCX, with a result of an improved surface morphology under a relatively As-rich(As/Ga ratio :28) condition, and of an increased lattics parameter of 1.1 1.7% in comparison with a GaAs substrate. However DCX and Raman spectroscopy revealed that the expanded lattics parameter and the crystallinity of LT GaAs could be recovered after RTA. On the other hand, PL spectra indicated that LT GaAs after RTA showed low optical sensitivity unlike High Temperature(HT) GaAs, and that its surface morphology and crystallinity were corresponded with those of HT GaAs. Finally PICTS spectra proved the fact that low sensitivity of LT GaAs was due to the deep level defects (Ec-0.85eV) which were strogly formed by raising RTA temperature to 750.deg. C.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.1010-1013
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• 2001

Zinc oxide(ZnO) films were prepared by ultrasonic spray pyrolysis on indium (In) films deposited by evaporation and subsequently submitted to rapid thermal annealing (RTA). The RTA was processed in air or a vacuum ambient. The crystallographic properties and surface morphologies of the films were characterized before and after the RTA by X-ray diffraction (XRD) and scanning electron microscopy(SEM), respectively. The resistivity variation of the films with RTA temperature and time was measured by the 4-point probe method. Auger electron spectroscopy(AES) was carried out to figure out the distribution of indium atoms in the ZnO films. The resistivity of the ZnO on In(ZnO/In) films decreased to 2${\times}$10$\^$-3/ $\Omega$cm by diffusion of the In. The In diffusion into the ZnO films roughened the surface of the ZnO films. The results of depth profile by AES showed a hump of In atoms around ZnO/In interface after the RTA at 800$^{\circ}C$, which disappeared by the RTA at 1000$^{\circ}C$. The effects of temperature, time and ambient during the RTA on the structural and electrical properties of the ZnO/In films were discussed.

• Journal of Magnetics
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• 제10권2호
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• pp.52-57
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• 2005

In this research, magnetoresistance (MR) ratio (MR), resistivity, and exchange coupling field $(H_{ex})$ behaviors for sputter deposited spin valves with FeMn antiferromagnetic layer have been extensively investigated by rapid thermal annealing (RTA) as well as conventional annealing (CA) method. 10 s of RTA revealed that interdiffusion was not significant up to $325^{\circ}C$ at the interfaces between the layers when the RTA time was short. The MR of FeMn spin valves were reduced when the spin valves were exposed to temperature of $250^{\circ}C$, even for a short time period of 10 s prior to CA. $H_{ex}$ was maintained up to $325^{\circ}C$ of CA when the specimen was subjected to 10 s of RTA at $200^{\circ}C$ prior to CA, which is $25^{\circ}C$ higher than the result obtained from the CA without prior RTA. Therefore, the stability of $H_{ex}$ could be enhanced by a prior RTA before performing CA up to annealing temperature of $325^{\circ}C$. MR and sensitivity of the specimens annealed without magnetic field up to $275^{\circ}C$ were recovered to the values prior to CA, but $H_{ex}$ was not recovered. This means that reduced MR sensitivity and MR during the device fabrication can be recovered by a field RTA.

• 한국세라믹학회지
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• 제30권10호
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• pp.803-810
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• 1993

PbxZr0.4Ti0.6O3 thin films were prepared by reactive co-sputtering and annealed by RTA(Rapid Thermal Annealing) process. Effect of Pb content in PbxZr0.4Ti0.6O3 films on the phase transformation was intensively studied. It has been found out that depending on the Pb content as well as RTA temperature, crystal structure of PbxZr0.4Ti0.6O3 films change greatly. It turned out that transformation temperature for perovskite can be lowered and the width of transition temperature region was reduced by increasing Pb content in the film. And the lattice was expanded with increasing Pb content. With increasing RTA temperature, as-deposited phase was transformed into perovskite through three different transformation paths depending on Pb content. It was confirmed that activation energies for nucleation of perovskite structure are much larger than those of its growth.

• 전자공학회논문지A
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• 제31A권8호
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• pp.80-90
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• 1994

The ultra shallow junction was formed by 2-step RTP. Phosphorus solid source(P$_{2}O_{5}$) was transfered on wafer surface during RTG(Rapid Thermal Glass Transfer) of which process condition was 80$0^{\circ}C$ and 60sec. The process temperature and time of the RTD(Rapid Thermal Diffusion) were 950~105$0^{\circ}C$ during 5~15sec respectively sheet resistances were measured as 175~320$\Omega$/m and junction depth and dopth and dopant surface concentration were measured as 0.075~0.18$\mu$m and 5${\times}10^{19}cm^{4}$ respectively. Ti-silicide was formed by 2-step RTA after 300$\AA$ Titanium was deposited. The 1st RTA (2nd RTA) was carried out at the temperature of $600^{\circ}C$(700~80$0^{\circ}C$) for 30 seconds (10~60 seconds) under N$_2$ ambient. Sheet resistances after 2nd RTA were measured as 46~63$\Omega$/D. Si/Ti component ratio was evaulated as 1.6~1.9 from Auger depth profile. Ti-Silicided n-p junction diode (pattern size : 400$\times$400$\mu$m) was fabricated under the RTD(the process was carried out at the temperature of 100$0^{\circ}C$ for 10seconds) and 2nd RTA(theprocess was carried out at the temperature of 750$^{\circ}C$ for 60 seconds). Leakage current was measured 1.8${\times}10^{7}A/mm^{2}$ at 5V reverse voltage. Whent the RTD process condition is at the temperature of 100$0^{\circ}C$ for 10seconds and the 2nd RTA process condition is at the temperature of 75$0^{\circ}C$ for 60 seconds leakage current was 29.15${\times}10^{9}A$(at 5V).